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Merge branch 'master' into port-samg55

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hathach
2019-11-24 21:22:42 +07:00
parent 3d748e6e2e 64b05a1d5f
commit 24b2cea139
206 changed files with 9686 additions and 1862 deletions
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54
src/tusb_option.h
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@@ -39,38 +39,42 @@
#define OPT_MCU_NONE 0
// LPC
#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx
#define OPT_MCU_LPC13XX 2 ///< NXP LPC13xx
#define OPT_MCU_LPC15XX 3 ///< NXP LPC15xx
#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x
#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x
#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
#define OPT_MCU_LPC54XXX 10 ///< NXP LPC54xxx
#define OPT_MCU_LPC55XX 11 ///< NXP LPC55xx
#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx
#define OPT_MCU_LPC13XX 2 ///< NXP LPC13xx
#define OPT_MCU_LPC15XX 3 ///< NXP LPC15xx
#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x
#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x
#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
#define OPT_MCU_LPC54XXX 10 ///< NXP LPC54xxx
#define OPT_MCU_LPC55XX 11 ///< NXP LPC55xx
// NRF
#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series
#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series
// SAM
#define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21
#define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51
#define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21
#define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51
// STM32
#define OPT_MCU_STM32F0 300 ///< ST STM32F0
#define OPT_MCU_STM32F1 301 ///< ST STM32F1
#define OPT_MCU_STM32F2 302 ///< ST STM32F2
#define OPT_MCU_STM32F3 303 ///< ST STM32F3
#define OPT_MCU_STM32F4 304 ///< ST STM32F4
#define OPT_MCU_STM32F7 305 ///< ST STM32F7
#define OPT_MCU_STM32H7 306 ///< ST STM32H7
#define OPT_MCU_STM32L0 307 ///< ST STM32L0
#define OPT_MCU_STM32L1 308 ///< ST STM32L1
#define OPT_MCU_STM32L4 309 ///< ST STM32L4
#define OPT_MCU_STM32F0 300 ///< ST STM32F0
#define OPT_MCU_STM32F1 301 ///< ST STM32F1
#define OPT_MCU_STM32F2 302 ///< ST STM32F2
#define OPT_MCU_STM32F3 303 ///< ST STM32F3
#define OPT_MCU_STM32F4 304 ///< ST STM32F4
#define OPT_MCU_STM32F7 305 ///< ST STM32F7
#define OPT_MCU_STM32H7 306 ///< ST STM32H7
#define OPT_MCU_STM32L0 307 ///< ST STM32L0
#define OPT_MCU_STM32L1 308 ///< ST STM32L1
#define OPT_MCU_STM32L4 309 ///< ST STM32L4
#define OPT_MCU_CXD56 400 ///< SONY CXD56
#define OPT_MCU_CXD56 400 ///< SONY CXD56
#define OPT_MCU_VALENTYUSB_EPTRI 600 ///< Fomu eptri config
#define OPT_MCU_MIMXRT10XX 700 ///< NXP iMX RT10xx
/** @} */