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refractor qhd_xfer_error_isr (omit xfer_type para)

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add accumulated total xferred byte for an endpoint until transfer with IOC set
- control xfer will have length of data phase in usbh_xfer_isr callback
This commit is contained in:
hathach
2013-07-06 14:52:02 +07:00
parent 68da489c2e
commit 25304d142f
5 changed files with 42 additions and 16 deletions
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3
tests/lpc18xx_43xx/test/host/ehci/test_pipe_bulk_xfer.c
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@@ -209,11 +209,12 @@ void test_bulk_xfer_complete_isr(void)
ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head;
ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_tail;
usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, TUSB_EVENT_XFER_COMPLETE, sizeof(data2));
usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, TUSB_EVENT_XFER_COMPLETE, sizeof(data2)+sizeof(xfer_data));
//------------- Code Under Test -------------//
ehci_controller_run(hostid);
TEST_ASSERT_EQUAL(0, p_qhd_bulk->total_xferred_bytes);
TEST_ASSERT_TRUE(p_qhd_bulk->qtd_overlay.next.terminate);
TEST_ASSERT_FALSE(p_head->used);
TEST_ASSERT_FALSE(p_tail->used);

8
tests/lpc18xx_43xx/test/host/ehci/test_pipe_control_xfer.c
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@@ -155,6 +155,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
p_data = &ehci_data.addr0_qtd[1];
p_status = &ehci_data.addr0_qtd[2];
TEST_ASSERT_EQUAL(0 , p_qhd->total_xferred_bytes);
TEST_ASSERT_EQUAL_HEX( p_setup, p_qhd->qtd_overlay.next.address );
TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list_head);
TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
@@ -227,11 +228,12 @@ void test_control_xfer_complete_isr(void)
{
TEST_ASSERT_STATUS( hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data) );
usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_COMPLETE, 0);
usbh_xfer_isr_Expect(((pipe_handle_t){.dev_addr = dev_addr}), 0, TUSB_EVENT_XFER_COMPLETE, 18);
//------------- Code Under TEST -------------//
ehci_controller_run(hostid);
TEST_ASSERT_EQUAL(0, p_control_qhd->total_xferred_bytes);
TEST_ASSERT_NULL(p_control_qhd->p_qtd_list_head);
TEST_ASSERT_NULL(p_control_qhd->p_qtd_list_tail);
@@ -249,6 +251,8 @@ void test_control_xfer_error_isr(void)
//------------- Code Under TEST -------------//
ehci_controller_run_error(hostid);
TEST_ASSERT_EQUAL(0, p_control_qhd->total_xferred_bytes);
}
void test_control_xfer_error_stall(void)
@@ -259,4 +263,6 @@ void test_control_xfer_error_stall(void)
//------------- Code Under TEST -------------//
ehci_controller_run_stall(hostid);
TEST_ASSERT_EQUAL(0, p_control_qhd->total_xferred_bytes);
}

8
tests/lpc18xx_43xx/test/host/ehci/test_pipe_interrupt_xfer.c
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@@ -201,7 +201,7 @@ void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void)
TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_interrupt, data2, sizeof(data2), true) );
usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_COMPLETE, sizeof(data2));
usbh_xfer_isr_Expect(pipe_hdl_interrupt, TUSB_CLASS_HID, TUSB_EVENT_XFER_COMPLETE, sizeof(xfer_data)+sizeof(data2));
ehci_qtd_t* p_head = p_qhd_interrupt->p_qtd_list_head;
ehci_qtd_t* p_tail = p_qhd_interrupt->p_qtd_list_tail;
@@ -209,6 +209,7 @@ void test_interrupt_xfer_complete_isr_interval_less_than_1ms(void)
//------------- Code Under Test -------------//
ehci_controller_run(hostid);
TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes);
check_qhd_after_complete(p_qhd_interrupt);
TEST_ASSERT_FALSE(p_head->used);
TEST_ASSERT_FALSE(p_tail->used);
@@ -230,6 +231,7 @@ void test_interrupt_xfer_complete_isr_interval_2ms(void)
//------------- Code Under Test -------------//
ehci_controller_run(hostid);
TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes);
check_qhd_after_complete(p_qhd_2ms);
TEST_ASSERT_FALSE(p_head->used);
TEST_ASSERT_FALSE(p_tail->used);
@@ -244,6 +246,8 @@ void test_interrupt_xfer_error_isr(void)
//------------- Code Under TEST -------------//
ehci_controller_run_error(hostid);
TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes);
}
void test_interrupt_xfer_error_stall(void)
@@ -254,5 +258,7 @@ void test_interrupt_xfer_error_stall(void)
//------------- Code Under TEST -------------//
ehci_controller_run_stall(hostid);
TEST_ASSERT_EQUAL(0, p_qhd_interrupt->total_xferred_bytes);
}

36
tinyusb/host/ehci/ehci.c
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@@ -517,23 +517,29 @@ static void port_connect_status_change_isr(uint8_t hostid)
static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
{
uint8_t max_loop = 0;
tusb_xfer_type_t const xfer_type = qhd_get_xfer_type(p_qhd);
// free all TDs from the head td to the first active TD
while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active)
while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active
&& max_loop < EHCI_MAX_QTD)
{
// TD need to be freed and removed from qhd, before invoking callback
bool is_ioc = (p_qhd->p_qtd_list_head->int_on_complete != 0);
uint16_t actual_bytes_xferred = p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
p_qhd->p_qtd_list_head->used = 0; // free QTD
qtd_remove_1st_from_qhd(p_qhd);
if (is_ioc) // end of request
{
{ // call USBH callback
usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type),
p_qhd->class_code, TUSB_EVENT_XFER_COMPLETE, actual_bytes_xferred); // call USBH callback
p_qhd->class_code, TUSB_EVENT_XFER_COMPLETE,
p_qhd->total_xferred_bytes - (xfer_type == TUSB_XFER_CONTROL ? 8 : 0) ); // subtract setup packet size if control,
p_qhd->total_xferred_bytes = 0;
}
max_loop++;
}
}
@@ -591,28 +597,35 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms)
}
#endif
static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd, tusb_xfer_type_t xfer_type)
static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
{
if ( (p_qhd->device_address != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL
p_qhd->qtd_overlay.buffer_err ||p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err )
//p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error
{
// current qhd has error in transaction
{ // current qhd has error in transaction
uint16_t total_xferred_bytes;
tusb_xfer_type_t const xfer_type = qhd_get_xfer_type(p_qhd);
tusb_event_t error_event;
// no error bits are set, endpoint is halted due to STALL
error_event = ( !(p_qhd->qtd_overlay.buffer_err || p_qhd->qtd_overlay.babble_err ||
p_qhd->qtd_overlay.xact_err) ) ? TUSB_EVENT_XFER_STALLED : TUSB_EVENT_XFER_ERROR;
uint16_t actual_bytes_xferred = p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
hal_debugger_breakpoint();
p_qhd->p_qtd_list_head->used = 0; // free QTD
qtd_remove_1st_from_qhd(p_qhd);
// subtract setup size if it is control xfer
total_xferred_bytes = p_qhd->total_xferred_bytes - (xfer_type == TUSB_XFER_CONTROL ? min8_of(8, p_qhd->total_xferred_bytes) : 0);
// call USBH callback
usbh_xfer_isr( qhd_create_pipe_handle(p_qhd, xfer_type),
p_qhd->class_code, error_event, actual_bytes_xferred); // call USBH callback
p_qhd->class_code, error_event,
total_xferred_bytes);
p_qhd->total_xferred_bytes = 0;
}
}
@@ -624,8 +637,7 @@ static void xfer_error_isr(uint8_t hostid)
ehci_qhd_t *p_qhd = async_head;
do
{
qhd_xfer_error_isr( p_qhd,
p_qhd->endpoint_number != 0 ? TUSB_XFER_BULK : TUSB_XFER_CONTROL);
qhd_xfer_error_isr( p_qhd );
p_qhd = qhd_next(p_qhd);
max_loop++;
}while(p_qhd != async_head && max_loop < EHCI_MAX_QHD); // async list traversal, stop if loop around
@@ -647,7 +659,7 @@ static void xfer_error_isr(uint8_t hostid)
case EHCI_QUEUE_ELEMENT_QHD:
{
ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) align32(next_item.address);
qhd_xfer_error_isr(p_qhd_int, TUSB_XFER_INTERRUPT);
qhd_xfer_error_isr(p_qhd_int);
}
break;

3
tinyusb/host/ehci/ehci.h
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@@ -199,8 +199,9 @@ typedef struct {
uint8_t pid_non_control;
uint8_t class_code;
uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set
uint8_t interval_ms; // polling interval in frames (or milisecond)
uint8_t reserved[3];
uint8_t reserved;
ehci_qtd_t *p_qtd_list_head; // head of the scheduled TD list
ehci_qtd_t *p_qtd_list_tail; // tail of the scheduled TD list