andy/tinyUSB
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

add device_os_none keil project for all boards

Browse Source
This commit is contained in:
hathach
2013-12-27 13:40:31 +07:00
parent 8de6ee22dc
commit 275e834bbe
18 changed files with 3394 additions and 286 deletions
Download Patch File Download Diff File Expand all files Collapse all files

819
demos/bsp/lpc11uxx/LPC11Uxx_DriverLib/lpc11uxx_gpio.c Normal file
View File

@@ -0,0 +1,819 @@
/****************************************************************************
* $Id:: gpio.c 6172 2011-01-13 18:22:51Z usb00423 $
* Project: NXP LPC11Uxx GPIO example
*
* Description:
* This file contains GPIO code example which include GPIO
* initialization, GPIO interrupt handler, and related APIs for
* GPIO access.
*
****************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
****************************************************************************/
#include "LPC11Uxx.h" /* LPC11Uxx Peripheral Registers */
#include "lpc11uxx_gpio.h"
volatile uint32_t flex_int0_counter = 0;
volatile uint32_t flex_int1_counter = 0;
volatile uint32_t flex_int2_counter = 0;
volatile uint32_t flex_int3_counter = 0;
volatile uint32_t flex_int4_counter = 0;
volatile uint32_t flex_int5_counter = 0;
volatile uint32_t flex_int6_counter = 0;
volatile uint32_t flex_int7_counter = 0;
volatile uint32_t gint0_counter = 0;
volatile uint32_t gint1_counter = 0;
volatile uint32_t flex_int0_level_counter = 0;
volatile uint32_t flex_int0_rising_edge_counter = 0;
volatile uint32_t flex_int0_falling_edge_counter = 0;
volatile uint32_t flex_int1_level_counter = 0;
volatile uint32_t flex_int1_rising_edge_counter = 0;
volatile uint32_t flex_int1_falling_edge_counter = 0;
volatile uint32_t flex_int2_level_counter = 0;
volatile uint32_t flex_int2_rising_edge_counter = 0;
volatile uint32_t flex_int2_falling_edge_counter = 0;
volatile uint32_t flex_int3_level_counter = 0;
volatile uint32_t flex_int3_rising_edge_counter = 0;
volatile uint32_t flex_int3_falling_edge_counter = 0;
volatile uint32_t flex_int4_level_counter = 0;
volatile uint32_t flex_int4_rising_edge_counter = 0;
volatile uint32_t flex_int4_falling_edge_counter = 0;
volatile uint32_t flex_int5_level_counter = 0;
volatile uint32_t flex_int5_rising_edge_counter = 0;
volatile uint32_t flex_int5_falling_edge_counter = 0;
volatile uint32_t flex_int6_level_counter = 0;
volatile uint32_t flex_int6_rising_edge_counter = 0;
volatile uint32_t flex_int6_falling_edge_counter = 0;
volatile uint32_t flex_int7_level_counter = 0;
volatile uint32_t flex_int7_rising_edge_counter = 0;
volatile uint32_t flex_int7_falling_edge_counter = 0;
volatile uint32_t gint0_level_counter = 0;
volatile uint32_t gint0_edge_counter = 0;
volatile uint32_t gint1_level_counter = 0;
volatile uint32_t gint1_edge_counter = 0;
/*****************************************************************************
** Function name: FLEX_INT0_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT0_IRQHandler(void)
{
flex_int0_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<0) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<0) )
{
flex_int0_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<0) )
{
flex_int0_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<0;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<0) )
{
flex_int0_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<0;
}
LPC_GPIO_PIN_INT->IST = 0x1<<0;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT1_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT1_IRQHandler(void)
{
flex_int1_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<1) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<1) )
{
flex_int1_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<1) )
{
flex_int1_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<1;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<1) )
{
flex_int1_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<1;
}
LPC_GPIO_PIN_INT->IST = 0x1<<1;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT2_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT2_IRQHandler(void)
{
flex_int2_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<2) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<2) )
{
flex_int2_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<2) )
{
flex_int2_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<2;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<2) )
{
flex_int2_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<2;
}
LPC_GPIO_PIN_INT->IST = 0x1<<2;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT3_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT3_IRQHandler(void)
{
flex_int3_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<3) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<3) )
{
flex_int3_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<3) )
{
flex_int3_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<3;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<3) )
{
flex_int3_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<3;
}
LPC_GPIO_PIN_INT->IST = 0x1<<3;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT4_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT4_IRQHandler(void)
{
flex_int4_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<4) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<4) )
{
flex_int4_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<4) )
{
flex_int4_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<4;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<4) )
{
flex_int4_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<4;
}
LPC_GPIO_PIN_INT->IST = 0x1<<4;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT5_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT5_IRQHandler(void)
{
flex_int5_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<5) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<5) )
{
flex_int5_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<5) )
{
flex_int5_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<5;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<5) )
{
flex_int5_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<5;
}
LPC_GPIO_PIN_INT->IST = 0x1<<5;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT6_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT6_IRQHandler(void)
{
flex_int6_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<6) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<6) )
{
flex_int6_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<6) )
{
flex_int6_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<6;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<6) )
{
flex_int6_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<6;
}
LPC_GPIO_PIN_INT->IST = 0x1<<6;
}
}
return;
}
/*****************************************************************************
** Function name: FLEX_INT7_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void FLEX_INT7_IRQHandler(void)
{
flex_int7_counter++;
if ( LPC_GPIO_PIN_INT->IST & (0x1<<7) )
{
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<7) )
{
flex_int7_level_counter++;
}
else
{
if ( LPC_GPIO_PIN_INT->RISE & (0x1<<7) )
{
flex_int7_rising_edge_counter++;
LPC_GPIO_PIN_INT->RISE = 0x1<<7;
}
else if ( LPC_GPIO_PIN_INT->FALL & (0x1<<7) )
{
flex_int7_falling_edge_counter++;
LPC_GPIO_PIN_INT->FALL = 0x1<<7;
}
LPC_GPIO_PIN_INT->IST = 0x1<<7;
}
}
return;
}
/*****************************************************************************
** Function name: GINT0_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void GINT0_IRQHandler(void)
{
gint0_counter++;
if ( LPC_GPIO_GROUP_INT0->CTRL & 0x1 )
{
if ( LPC_GPIO_GROUP_INT0->CTRL & (0x1<<4) )
{
gint0_level_counter++;
}
else
{
gint0_edge_counter++;
}
LPC_GPIO_GROUP_INT0->CTRL |= 0x1;
}
return;
}
/*****************************************************************************
** Function name: GINT1_IRQHandler
**
** Descriptions: Use one GPIO pin as interrupt source
**
** parameters: None
**
** Returned value: None
**
*****************************************************************************/
void GINT1_IRQHandler(void)
{
gint1_counter++;
if ( LPC_GPIO_GROUP_INT1->CTRL & 0x1 )
{
if ( LPC_GPIO_GROUP_INT1->CTRL & (0x1<<4) )
{
gint1_level_counter++;
}
else
{
gint1_edge_counter++;
}
LPC_GPIO_GROUP_INT1->CTRL |= 0x1;
}
return;
}
/*****************************************************************************
** Function name: GPIOInit
**
** Descriptions: Initialize GPIO, install the
** GPIO interrupt handler
**
** parameters: None
**
** Returned value: true or false, return false if the VIC table
** is full and GPIO interrupt handler can be
** installed.
**
*****************************************************************************/
void GPIOInit( void )
{
/* Enable AHB clock to the GPIO domain. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6);
/* Enable AHB clock to the FlexInt, GroupedInt domain. */
LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<19) | (1<<23) | (1<<24));
return;
}
/*****************************************************************************
** Function name: GPIOSetFlexInterrupt
**
** Descriptions: Set interrupt sense, event, etc.
** sense: edge or level, 0 is edge, 1 is level
** event/polarity: 0 is active low/falling, 1 is high/rising.
**
** parameters: channel #, port #, bit position, sense, event(polarity)
**
** Returned value: None
**
*****************************************************************************/
void GPIOSetFlexInterrupt( uint32_t channelNum, uint32_t portNum, uint32_t bitPosi,
uint32_t sense, uint32_t event )
{
switch ( channelNum )
{
case CHANNEL0:
if ( portNum )
{
LPC_SYSCON->PINTSEL[0] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[0] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT0_IRQn);
break;
case CHANNEL1:
if ( portNum )
{
LPC_SYSCON->PINTSEL[1] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[1] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT1_IRQn);
break;
case CHANNEL2:
if ( portNum )
{
LPC_SYSCON->PINTSEL[2] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[2] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT2_IRQn);
break;
case CHANNEL3:
if ( portNum )
{
LPC_SYSCON->PINTSEL[3] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[3] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT3_IRQn);
break;
case CHANNEL4:
if ( portNum )
{
LPC_SYSCON->PINTSEL[4] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[4] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT4_IRQn);
break;
case CHANNEL5:
if ( portNum )
{
LPC_SYSCON->PINTSEL[5] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[5] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT5_IRQn);
break;
case CHANNEL6:
if ( portNum )
{
LPC_SYSCON->PINTSEL[6] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[6] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT6_IRQn);
break;
case CHANNEL7:
if ( portNum )
{
LPC_SYSCON->PINTSEL[7] = bitPosi + 24;
}
else
{
LPC_SYSCON->PINTSEL[7] = bitPosi;
}
NVIC_EnableIRQ(FLEX_INT7_IRQn);
break;
default:
break;
}
if ( sense == 0 )
{
LPC_GPIO_PIN_INT->ISEL &= ~(0x1<<channelNum); /* Edge trigger */
if ( event == 0 )
{
LPC_GPIO_PIN_INT->IENF |= (0x1<<channelNum); /* faling edge */
}
else
{
LPC_GPIO_PIN_INT->IENR |= (0x1<<channelNum); /* Rising edge */
}
}
else
{
LPC_GPIO_PIN_INT->ISEL |= (0x1<<channelNum); /* Level trigger. */
LPC_GPIO_PIN_INT->IENR |= (0x1<<channelNum); /* Level enable */
if ( event == 0 )
{
LPC_GPIO_PIN_INT->IENF &= ~(0x1<<channelNum); /* active-low */
}
else
{
LPC_GPIO_PIN_INT->IENF |= (0x1<<channelNum); /* active-high */
}
}
return;
}
/*****************************************************************************
** Function name: GPIOFlexIntEnable
**
** Descriptions: Enable Interrupt
**
** parameters: channel num, event(0 is falling edge, 1 is rising edge)
** Returned value: None
**
*****************************************************************************/
void GPIOFlexIntEnable( uint32_t channelNum, uint32_t event )
{
if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) )
{
if ( event == 0 )
{
LPC_GPIO_PIN_INT->SIENF |= (0x1<<channelNum); /* faling edge */
}
else
{
LPC_GPIO_PIN_INT->SIENR |= (0x1<<channelNum); /* Rising edge */
}
}
else
{
LPC_GPIO_PIN_INT->SIENR |= (0x1<<channelNum); /* Level */
}
return;
}
/*****************************************************************************
** Function name: GPIOFlexIntDisable
**
** Descriptions: Disable Interrupt
**
** parameters: channel num, event(0 is falling edge, 1 is rising edge)
**
** Returned value: None
**
*****************************************************************************/
void GPIOFlexIntDisable( uint32_t channelNum, uint32_t event )
{
if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) )
{
if ( event == 0 )
{
LPC_GPIO_PIN_INT->CIENF |= (0x1<<channelNum); /* faling edge */
}
else
{
LPC_GPIO_PIN_INT->CIENR |= (0x1<<channelNum); /* Rising edge */
}
}
else
{
LPC_GPIO_PIN_INT->CIENR |= (0x1<<channelNum); /* Level */
}
return;
}
/*****************************************************************************
** Function name: GPIOFlexIntStatus
**
** Descriptions: Get Interrupt status
**
** parameters: channel num
**
** Returned value: None
**
*****************************************************************************/
uint32_t GPIOFlexIntStatus( uint32_t channelNum )
{
if ( LPC_GPIO_PIN_INT->IST & (0x1<<channelNum) )
{
return( 1 );
}
else
{
return( 0 );
}
}
/*****************************************************************************
** Function name: GPIOFlexIntClear
**
** Descriptions: Clear Interrupt
**
** parameters: channel num
**
** Returned value: None
**
*****************************************************************************/
void GPIOFlexIntClear( uint32_t channelNum )
{
if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) )
{
LPC_GPIO_PIN_INT->IST = (1<<channelNum);
}
return;
}
/*****************************************************************************
** Function name: GPIOSetGroupedInterrupt
**
** Descriptions: Set interrupt logic, sense, eventPattern, etc.
** logic: AND or OR, 0 is OR, 1 is AND
** sensePattern: edge or level, 0 is edge, 1 is level
** event/polarity: 0 is active low/falling, 1 is high/rising.
**
** parameters: group #, bit pattern, logic, sense, event(polarity) pattern
**
** Returned value: None
**
*****************************************************************************/
void GPIOSetGroupedInterrupt( uint32_t groupNum, uint32_t *bitPattern, uint32_t logic,
uint32_t sense, uint32_t *eventPattern )
{
switch ( groupNum )
{
case GROUP0:
if ( sense == 0 )
{
LPC_GPIO_GROUP_INT0->CTRL &= ~(0x1<<2); /* Edge trigger */
}
else
{
LPC_GPIO_GROUP_INT0->CTRL |= (0x1<<2); /* Level trigger. */
}
LPC_GPIO_GROUP_INT0->CTRL |= (logic<<1);
LPC_GPIO_GROUP_INT0->PORT_POL[0] = *((uint32_t *)(eventPattern + 0));
LPC_GPIO_GROUP_INT0->PORT_POL[1] = *((uint32_t *)(eventPattern + 1));
LPC_GPIO_GROUP_INT0->PORT_ENA[0] = *((uint32_t *)(bitPattern + 0));
LPC_GPIO_GROUP_INT0->PORT_ENA[1] = *((uint32_t *)(bitPattern + 1));
/* as soon as enabled, an edge may be generated */
/* clear interrupt flag and NVIC pending interrupt to */
/* workaround the potential edge generated as enabled */
LPC_GPIO_GROUP_INT0->CTRL |= (1<<0);
NVIC_ClearPendingIRQ(GINT0_IRQn);
NVIC_EnableIRQ(GINT0_IRQn);
break;
case GROUP1:
if ( sense == 0 )
{
LPC_GPIO_GROUP_INT1->CTRL &= ~(0x1<<2); /* Edge trigger */
}
else
{
LPC_GPIO_GROUP_INT1->CTRL |= (0x1<<2); /* Level trigger. */
}
LPC_GPIO_GROUP_INT1->CTRL |= (logic<<1);
LPC_GPIO_GROUP_INT1->PORT_POL[0] = *((uint32_t *)(eventPattern + 0));
LPC_GPIO_GROUP_INT1->PORT_POL[1] = *((uint32_t *)(eventPattern + 1));
LPC_GPIO_GROUP_INT1->PORT_ENA[0] = *((uint32_t *)(bitPattern + 0));
LPC_GPIO_GROUP_INT1->PORT_ENA[1] = *((uint32_t *)(bitPattern + 1));
/* as soon as enabled, an edge may be generated */
/* clear interrupt flag and NVIC pending interrupt to */
/* workaround the potential edge generated as enabled */
LPC_GPIO_GROUP_INT1->CTRL |= (1<<0);
NVIC_ClearPendingIRQ(GINT1_IRQn);
NVIC_EnableIRQ(GINT1_IRQn);
break;
default:
break;
}
return;
}
/*****************************************************************************
** Function name: GPIOGetPinValue
**
** Descriptions: Read Current state of port pin, PIN register value
**
** parameters: port num, bit position
** Returned value: None
**
*****************************************************************************/
uint32_t GPIOGetPinValue( uint32_t portNum, uint32_t bitPosi )
{
uint32_t regVal = 0;
if( bitPosi < 0x20 )
{
if ( LPC_GPIO->PIN[portNum] & (0x1<<bitPosi) )
{
regVal = 1;
}
}
else if( bitPosi == 0xFF )
{
regVal = LPC_GPIO->PIN[portNum];
}
return ( regVal );
}
/*****************************************************************************
** Function name: GPIOSetBitValue
**
** Descriptions: Set/clear a bit in a specific position
**
** parameters: port num, bit position, bit value
**
** Returned value: None
**
*****************************************************************************/
void GPIOSetBitValue( uint32_t portNum, uint32_t bitPosi, uint32_t bitVal )
{
if ( bitVal )
{
LPC_GPIO->SET[portNum] = 1<<bitPosi;
}
else
{
LPC_GPIO->CLR[portNum] = 1<<bitPosi;
}
return;
}
/*****************************************************************************
** Function name: GPIOSetDir
**
** Descriptions: Set the direction in GPIO port
**
** parameters: portNum, bit position, direction (1 out, 0 input)
**
** Returned value: None
**
*****************************************************************************/
void GPIOSetDir( uint32_t portNum, uint32_t bitPosi, uint32_t dir )
{
if( dir )
{
LPC_GPIO->DIR[portNum] |= (1<<bitPosi);
}
else
{
LPC_GPIO->DIR[portNum] &= ~(1<<bitPosi);
}
return;
}
/******************************************************************************
** End Of File
******************************************************************************/

64
demos/bsp/lpc11uxx/LPC11Uxx_DriverLib/lpc11uxx_gpio.h Normal file
View File

@@ -0,0 +1,64 @@
/****************************************************************************
* $Id:: gpio.h 6172 2011-01-13 18:22:51Z usb00423 $
* Project: NXP LPC11Uxx software example
*
* Description:
* This file contains definition and prototype for GPIO.
*
****************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
****************************************************************************/
#ifndef __GPIO_H
#define __GPIO_H
#define CHANNEL0 0
#define CHANNEL1 1
#define CHANNEL2 2
#define CHANNEL3 3
#define CHANNEL4 4
#define CHANNEL5 5
#define CHANNEL6 6
#define CHANNEL7 7
#define PORT0 0
#define PORT1 1
#define GROUP0 0
#define GROUP1 1
void FLEX_INT0_IRQHandler(void);
void FLEX_INT1_IRQHandler(void);
void FLEX_INT2_IRQHandler(void);
void FLEX_INT3_IRQHandler(void);
void FLEX_INT4_IRQHandler(void);
void FLEX_INT5_IRQHandler(void);
void FLEX_INT6_IRQHandler(void);
void FLEX_INT7_IRQHandler(void);
void GINT0_IRQHandler(void);
void GINT1_IRQHandler(void);
void GPIOInit( void );
void GPIOSetFlexInterrupt( uint32_t channelNum, uint32_t portNum, uint32_t bitPosi,
uint32_t sense, uint32_t event );
void GPIOFlexIntEnable( uint32_t channelNum, uint32_t event );
void GPIOFlexIntDisable( uint32_t channelNum, uint32_t event );
uint32_t GPIOFlexIntStatus( uint32_t channelNum );
void GPIOFlexIntClear( uint32_t channelNum );
void GPIOSetGroupedInterrupt( uint32_t groupNum, uint32_t *bitPattern, uint32_t logic,
uint32_t sense, uint32_t *eventPattern );
uint32_t GPIOGetPinValue( uint32_t portNum, uint32_t bitPosi );
void GPIOSetBitValue( uint32_t portNum, uint32_t bitPosi, uint32_t bitVal );
void GPIOSetDir( uint32_t portNum, uint32_t bitPosi, uint32_t dir );
#endif /* end __GPIO_H */
/*****************************************************************************
** End Of File
******************************************************************************/

238
demos/bsp/lpc11uxx/LPC11Uxx_DriverLib/lpc11uxx_uart.c Normal file
View File

@@ -0,0 +1,238 @@
/*****************************************************************************
* uart.c: UART API file for NXP LPC11xx Family Microprocessors
*
* Copyright(C) 2008, NXP Semiconductor
* All rights reserved.
*
* History
* 2009.12.07 ver 1.00 Preliminary version, first Release
*
******************************************************************************/
#include <stdint.h>
#include "LPC11Uxx.h"
#include "lpc11uxx_uart.h"
volatile uint32_t UARTStatus;
volatile uint8_t UARTTxEmpty = 1;
volatile uint8_t UARTBuffer[BUFSIZE];
volatile uint32_t UARTCount = 0;
/*****************************************************************************
** Function name: UART_IRQHandler
**
** Descriptions: UART interrupt handler
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void UART_IRQHandler(void)
{
uint8_t IIRValue, LSRValue;
uint8_t Dummy = Dummy;
IIRValue = LPC_USART->IIR;
IIRValue >>= 1; /* skip pending bit in IIR */
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
if (IIRValue == IIR_RLS) /* Receive Line Status */
{
LSRValue = LPC_USART->LSR;
/* Receive Line Status */
if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
{
/* There are errors or break interrupt */
/* Read LSR will clear the interrupt */
UARTStatus = LSRValue;
Dummy = LPC_USART->RBR; /* Dummy read on RX to clear
interrupt, then bail out */
return;
}
if (LSRValue & LSR_RDR) /* Receive Data Ready */
{
/* If no error on RLS, normal ready, save into the data buffer. */
/* Note: read RBR will clear the interrupt */
UARTBuffer[UARTCount++] = LPC_USART->RBR;
if (UARTCount == BUFSIZE)
{
UARTCount = 0; /* buffer overflow */
}
}
}
else if (IIRValue == IIR_RDA) /* Receive Data Available */
{
/* Receive Data Available */
UARTBuffer[UARTCount++] = LPC_USART->RBR;
if (UARTCount == BUFSIZE)
{
UARTCount = 0; /* buffer overflow */
}
}
else if (IIRValue == IIR_CTI) /* Character timeout indicator */
{
/* Character Time-out indicator */
UARTStatus |= 0x100; /* Bit 9 as the CTI error */
}
else if (IIRValue == IIR_THRE) /* THRE, transmit holding register empty */
{
/* THRE interrupt */
LSRValue = LPC_USART->LSR; /* Check status in the LSR to see if
valid data in U0THR or not */
if (LSRValue & LSR_THRE)
{
UARTTxEmpty = 1;
}
else
{
UARTTxEmpty = 0;
}
}
return;
}
#if MODEM_TEST
/*****************************************************************************
** Function name: ModemInit
**
** Descriptions: Initialize UART0 port as modem, setup pin select.
**
** parameters: None
** Returned value: None
**
*****************************************************************************/
void ModemInit( void )
{
LPC_IOCON->PIO2_0 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO2_0 |= 0x01; /* UART DTR */
LPC_IOCON->PIO0_7 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO0_7 |= 0x01; /* UART CTS */
LPC_IOCON->PIO1_5 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO1_5 |= 0x01; /* UART RTS */
#if 1
LPC_IOCON->DSR_LOC = 0;
LPC_IOCON->PIO2_1 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO2_1 |= 0x01; /* UART DSR */
LPC_IOCON->DCD_LOC = 0;
LPC_IOCON->PIO2_2 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO2_2 |= 0x01; /* UART DCD */
LPC_IOCON->RI_LOC = 0;
LPC_IOCON->PIO2_3 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO2_3 |= 0x01; /* UART RI */
#else
LPC_IOCON->DSR_LOC = 1;
LPC_IOCON->PIO3_1 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO3_1 |= 0x01; /* UART DSR */
LPC_IOCON->DCD_LOC = 1;
LPC_IOCON->PIO3_2 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO3_2 |= 0x01; /* UART DCD */
LPC_IOCON->RI_LOC = 1;
LPC_IOCON->PIO3_3 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO3_3 |= 0x01; /* UART RI */
#endif
LPC_USART->MCR = 0xC0; /* Enable Auto RTS and Auto CTS. */
return;
}
#endif
/*****************************************************************************
** Function name: UARTInit
**
** Descriptions: Initialize UART0 port, setup pin select,
** clock, parity, stop bits, FIFO, etc.
**
** parameters: UART baudrate
** Returned value: None
**
*****************************************************************************/
void UARTInit(uint32_t baudrate)
{
uint32_t Fdiv;
uint32_t regVal;
UARTTxEmpty = 1;
UARTCount = 0;
NVIC_DisableIRQ(UART_IRQn);
LPC_IOCON->PIO0_18 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO0_18 |= 0x01; /* UART RXD */
LPC_IOCON->PIO0_19 &= ~0x07;
LPC_IOCON->PIO0_19 |= 0x01; /* UART TXD */
/* Enable UART clock */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
LPC_USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
regVal = LPC_SYSCON->UARTCLKDIV;
Fdiv = (((SystemCoreClock*LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate ; /*baud rate */
LPC_USART->DLM = Fdiv / 256;
LPC_USART->DLL = Fdiv % 256;
LPC_USART->LCR = 0x03; /* DLAB = 0 */
LPC_USART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
/* Read to clear the line status. */
regVal = LPC_USART->LSR;
/* Ensure a clean start, no data in either TX or RX FIFO. */
// CodeRed - added parentheses around comparison in operand of &
while (( LPC_USART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
while ( LPC_USART->LSR & LSR_RDR )
{
regVal = LPC_USART->RBR; /* Dump data from RX FIFO */
}
/* Enable the UART Interrupt */
NVIC_EnableIRQ(UART_IRQn);
#if CONFIG_UART_ENABLE_INTERRUPT==1
#if CONFIG_UART_ENABLE_TX_INTERRUPT==1
LPC_USART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
#else
LPC_USART->IER = IER_RBR | IER_RLS; /* Enable UART interrupt */
#endif
#endif
return;
}
/*****************************************************************************
** Function name: UARTSend
**
** Descriptions: Send a block of data to the UART 0 port based
** on the data length
**
** parameters: buffer pointer, and data length
** Returned value: None
**
*****************************************************************************/
void UARTSend(uint8_t *BufferPtr, uint32_t Length)
{
while ( Length != 0 )
{
/* THRE status, contain valid data */
#if CONFIG_UART_ENABLE_TX_INTERRUPT==1
/* Below flag is set inside the interrupt handler when THRE occurs. */
while ( !(UARTTxEmpty & 0x01) );
LPC_USART->THR = *BufferPtr;
UARTTxEmpty = 0; /* not empty in the THR until it shifts out */
#else
while ( !(LPC_USART->LSR & LSR_THRE) );
LPC_USART->THR = *BufferPtr;
#endif
BufferPtr++;
Length--;
}
return;
}
/******************************************************************************
** End Of File
******************************************************************************/

55
demos/bsp/lpc11uxx/LPC11Uxx_DriverLib/lpc11uxx_uart.h Normal file
View File

@@ -0,0 +1,55 @@
/*****************************************************************************
* uart.h: Header file for NXP LPC1xxx Family Microprocessors
*
* Copyright(C) 2008, NXP Semiconductor
* All rights reserved.
*
* History
* 2009.12.07 ver 1.00 Preliminary version, first Release
*
******************************************************************************/
#ifndef __UART_H
#define __UART_H
#define RS485_ENABLED 0
#define TX_INTERRUPT 0 /* 0 if TX uses polling, 1 interrupt driven. */
#define MODEM_TEST 0
#define IER_RBR 0x01
#define IER_THRE 0x02
#define IER_RLS 0x04
#define IIR_PEND 0x01
#define IIR_RLS 0x03
#define IIR_RDA 0x02
#define IIR_CTI 0x06
#define IIR_THRE 0x01
#define LSR_RDR 0x01
#define LSR_OE 0x02
#define LSR_PE 0x04
#define LSR_FE 0x08
#define LSR_BI 0x10
#define LSR_THRE 0x20
#define LSR_TEMT 0x40
#define LSR_RXFE 0x80
#define BUFSIZE 0x40
/* RS485 mode definition. */
#define RS485_NMMEN (0x1<<0)
#define RS485_RXDIS (0x1<<1)
#define RS485_AADEN (0x1<<2)
#define RS485_SEL (0x1<<3)
#define RS485_DCTRL (0x1<<4)
#define RS485_OINV (0x1<<5)
void ModemInit( void );
void UARTInit(uint32_t Baudrate);
void UART_IRQHandler(void);
void UARTSend(uint8_t *BufferPtr, uint32_t Length);
#endif /* end __UART_H */
/*****************************************************************************
** End Of File
******************************************************************************/