refactor ehci, since usbh only queue 1 TD per queue head
This commit is contained in:
		@@ -156,9 +156,6 @@ static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
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static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
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static inline ehci_qtd_t* qtd_find_free (void);
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static inline ehci_qtd_t* qtd_next (ehci_qtd_t const * p_qtd);
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static inline void qtd_insert_to_qhd (ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new);
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static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd);
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static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
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static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
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@@ -473,11 +470,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
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  hcd_dcache_clean((void *) setup_packet, 8);
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  hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
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  // sw region
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  qhd->p_qtd_list_head = td;
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  qhd->p_qtd_list_tail = td;
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  // attach TD
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  qhd->p_attached_qtd = td; // software management
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  qhd->qtd_overlay.next.address = (uint32_t) td;
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  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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@@ -501,7 +495,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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    qtd_init(qtd, buffer, buflen);
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    // first first data toggle is always 1 (data & setup stage)
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    // first data toggle is always 1 (data & setup stage)
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    qtd->data_toggle = 1;
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    qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT;
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  } else {
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@@ -521,11 +515,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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  }
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  hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
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  // Software: assign TD to QHD
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  qhd->p_qtd_list_head = qtd;
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  qhd->p_qtd_list_tail = qtd;
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  // attach TD to QHD start transferring
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  qhd->p_attached_qtd = qtd; // software management
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  qhd->qtd_overlay.next.address = (uint32_t) qtd;
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  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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@@ -580,27 +571,25 @@ void port_connect_status_change_isr(uint8_t rhport)
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TU_ATTR_ALWAYS_INLINE static inline
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void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
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{
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  // free all TDs from the head td to the first active TD
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  while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active)
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  {
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    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
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    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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  // examine TD attached to queue head
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  ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_attached_qtd;
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  if (qtd == NULL) return; // no TD attached
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  hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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    bool const is_ioc = (qtd->int_on_complete != 0);
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    uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
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    p_qhd->total_xferred_bytes += qtd->expected_bytes - qtd->total_bytes;
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    // TD need to be freed and removed from qhd, before invoking callback
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    qtd->used = 0; // free QTD
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    qtd_remove_1st_from_qhd(p_qhd);
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    if (is_ioc)
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    {
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      hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, p_qhd->total_xferred_bytes, XFER_RESULT_SUCCESS, true);
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      p_qhd->total_xferred_bytes = 0;
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    }
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  // TD is still active, no need to process
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  if (qtd->active) {
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    return;
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  }
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  uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
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  uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
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  // remove and free TD before invoking callback
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  p_qhd->p_attached_qtd = NULL;
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  qtd->used = 0; // free QTD
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  // IOC is always set
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  hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, xferred_bytes, XFER_RESULT_SUCCESS, true);
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}
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TU_ATTR_ALWAYS_INLINE static inline
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@@ -685,20 +674,17 @@ void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
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//      while(1){}
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//    }
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    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
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    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_attached_qtd;
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    TU_ASSERT(qtd, ); // No TD yet, probably a race condition or cache issue !?
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    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
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    p_qhd->total_xferred_bytes += qtd->expected_bytes - qtd->total_bytes;
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    uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
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    p_qhd->p_attached_qtd = NULL;
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    qtd->used = 0; // free QTD
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    qtd_remove_1st_from_qhd(p_qhd);
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    if ( 0 == p_qhd->ep_number ) {
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      // control cannot be halted --> clear all qtd list
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      p_qhd->p_qtd_list_head = NULL;
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      p_qhd->p_qtd_list_tail = NULL;
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      // control cannot be halted
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      p_qhd->qtd_overlay.next.terminate      = 1;
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      p_qhd->qtd_overlay.alternate.terminate = 1;
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      p_qhd->qtd_overlay.halted              = 0;
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@@ -707,19 +693,17 @@ void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
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      p_setup->used = 0;
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    }
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    // call USBH callback
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    // notify usbh
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    uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0);
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    hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, p_qhd->total_xferred_bytes, xfer_result, true);
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    p_qhd->total_xferred_bytes = 0;
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    hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
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  }
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}
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TU_ATTR_ALWAYS_INLINE static inline
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void xfer_error_isr(uint8_t hostid)
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void xfer_error_isr(uint8_t rhport)
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{
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  //------------- async list -------------//
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  ehci_qhd_t * const async_head = qhd_async_head(hostid);
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  ehci_qhd_t * const async_head = qhd_async_head(rhport);
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  ehci_qhd_t *p_qhd = async_head;
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  do
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  {
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@@ -729,10 +713,10 @@ void xfer_error_isr(uint8_t hostid)
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  }while(p_qhd != async_head); // async list traversal, stop if loop around
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  //------------- TODO refractor period list -------------//
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  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1u);
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  uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
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  for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
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  {
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    ehci_link_t next_item = * get_period_head(hostid, interval_ms);
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    ehci_link_t next_item = * get_period_head(rhport, interval_ms);
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    // TODO abstract max loop guard for period
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    while( !next_item.terminate &&
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@@ -873,34 +857,6 @@ static inline ehci_qtd_t* qtd_find_free(void)
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  return NULL;
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}
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static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd )
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{
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  return (ehci_qtd_t*) tu_align32(p_qtd->next.address);
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}
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static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd)
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{
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  if (p_qhd->p_qtd_list_head == p_qhd->p_qtd_list_tail) // last TD --> make it NULL
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  {
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    p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = NULL;
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  }else
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  {
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    p_qhd->p_qtd_list_head = qtd_next( p_qhd->p_qtd_list_head );
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  }
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}
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static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new)
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{
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  if (p_qhd->p_qtd_list_head == NULL) // empty list
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  {
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    p_qhd->p_qtd_list_head               = p_qhd->p_qtd_list_tail = p_qtd_new;
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  }else
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  {
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    p_qhd->p_qtd_list_tail->next.address = (uint32_t) p_qtd_new;
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    p_qhd->p_qtd_list_tail               = p_qtd_new;
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  }
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}
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static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
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{
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  // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise)
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@@ -955,15 +911,14 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
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    p_qhd->int_smask = p_qhd->fl_int_cmask = 0;
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  }
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  p_qhd->fl_hub_addr     = devtree_info.hub_addr;
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  p_qhd->fl_hub_port     = devtree_info.hub_port;
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  p_qhd->mult            = 1; // TODO not use high bandwidth/park mode yet
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  p_qhd->fl_hub_addr    = devtree_info.hub_addr;
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  p_qhd->fl_hub_port    = devtree_info.hub_port;
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  p_qhd->mult           = 1; // TODO not use high bandwidth/park mode yet
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  //------------- HCD Management Data -------------//
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  p_qhd->used            = 1;
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  p_qhd->removing        = 0;
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  p_qhd->p_qtd_list_head = NULL;
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  p_qhd->p_qtd_list_tail = NULL;
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  p_qhd->used           = 1;
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  p_qhd->removing       = 0;
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  p_qhd->p_attached_qtd = NULL;
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  p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
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  //------------- active, but no TD list -------------//
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@@ -164,12 +164,10 @@ typedef struct TU_ATTR_ALIGNED(32)
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	uint8_t pid;
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	uint8_t interval_ms; // polling interval in frames (or millisecond)
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	uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set
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	uint8_t reserved2[2];
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	uint8_t TU_RESERVED[8];
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  // TODO USBH will only queue 1 TD per QHD, thus we can remove the list
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	ehci_qtd_t * volatile p_qtd_list_head;	// head of the scheduled TD list
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	ehci_qtd_t * volatile p_qtd_list_tail;	// tail of the scheduled TD list
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  // usbh will only queue 1 TD per QHD
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	ehci_qtd_t * volatile p_attached_qtd;
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} ehci_qhd_t;
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TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" );
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@@ -248,14 +246,6 @@ typedef struct TU_ATTR_ALIGNED(32)
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	/// Word 4-5: Buffer Pointer List
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	uint32_t buffer[2];		// buffer[1] TP: Transaction Position - T-Count: Transaction Count
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// 	union{
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// 		uint32_t BufferPointer1;
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// 		struct  {
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// 			volatile uint32_t TCount : 3;
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// 			volatile uint32_t TPosition : 2;
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// 		};
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// 	};
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	/*---------- Word 6 ----------*/
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	ehci_link_t back;
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