adding lpc1549, but couldnt recieve setup packet, though setup received interrupt is triggered
This commit is contained in:
@@ -28,9 +28,11 @@
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/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller with code name LPC IP3511
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* for almost their new MCUs. Currently supported and tested families are
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* - LPC11Uxx
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* - LPC13xx
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* - LPC51Uxx
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* - LPC11U68, LPC11U37
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* - LPC1347
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* - LPC51U68
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* - LPC54114
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* - LPC55s69
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*
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* For similar controller of other families, this file may require some minimal changes to work with.
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* Previous MCUs such as LPC17xx, LPC40xx, LPC18xx, LPC43xx have their own driver implementation.
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@@ -38,20 +40,23 @@
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#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
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CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
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CFG_TUSB_MCU == OPT_MCU_LPC15XX || \
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CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \
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CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
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CFG_TUSB_MCU == OPT_MCU_LPC55XX)
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#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX
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// LPC11Uxx and LPC13xx use lpcopen
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#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC15XX
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// LPC 11Uxx, 13xx, 15xx use lpcopen
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#include "chip.h"
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#define DCD_REGS LPC_USB
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#define DCD_IRQHandler USB_IRQHandler
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#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
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CFG_TUSB_MCU == OPT_MCU_LPC55XX // TODO 55xx has dual usb controllers
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#include "fsl_device_registers.h"
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#define DCD_REGS USB0
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#define DCD_IRQHandler USB0_IRQHandler
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#endif
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#include "device/dcd.h"
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@@ -61,6 +66,9 @@
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//--------------------------------------------------------------------+
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// Number of endpoints
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// - 11 13 15 51 54 has 5x2 endpoints
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// - 18/43 usb0 & 55s usb1 (HS) has 6x2 endpoints
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// - 18/43 usb1 & 55s usb0 (FS) has 4x2 endpoints
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#define EP_COUNT 10
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// only SRAM1 & USB RAM can be used for transfer.
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@@ -166,7 +174,7 @@ void dcd_init(uint8_t rhport)
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DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt
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DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK;
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DCD_REGS->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK |
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CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
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CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
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NVIC_ClearPendingIRQ(USB0_IRQn);
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}
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@@ -270,7 +278,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
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prepare_ep_xfer(ep_id, get_buf_offset(buffer), total_bytes);
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return true;
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return true;
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}
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//--------------------------------------------------------------------+
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@@ -329,7 +337,7 @@ static void process_xfer_isr(uint32_t int_status)
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void DCD_IRQHandler(void)
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{
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uint32_t const dev_cmd_stat = DCD_REGS->DEVCMDSTAT;
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uint32_t const cmd_stat = DCD_REGS->DEVCMDSTAT;
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uint32_t int_status = DCD_REGS->INTSTAT & DCD_REGS->INTEN;
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DCD_REGS->INTSTAT = int_status; // Acknowledge handled interrupt
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@@ -340,16 +348,16 @@ void DCD_IRQHandler(void)
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if ( int_status & INT_DEVICE_STATUS_MASK )
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{
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DCD_REGS->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
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if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
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if ( cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
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{
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bus_reset();
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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}
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if (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
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if (cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
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{
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// device disconnect
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if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
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if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
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{
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// debouncing as this can be set when device is powering
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dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
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@@ -357,12 +365,12 @@ void DCD_IRQHandler(void)
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}
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// TODO support suspend & resume
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if (dev_cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK)
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if (cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK)
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{
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if (dev_cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK)
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if (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK)
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{ // suspend signal, bus idle for more than 3ms
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// Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
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if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
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if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
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{
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dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
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}
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@@ -376,7 +384,7 @@ void DCD_IRQHandler(void)
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}
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// Setup Receive
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if ( tu_bit_test(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
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if ( tu_bit_test(int_status, 0) && (cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
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{
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// Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints
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_dcd.ep[0][0].active = _dcd.ep[1][0].active = 0;
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