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simplify qspi flash with blocking API

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This commit is contained in:
hathach
2018-10-23 19:54:06 +07:00
parent 177adf4bfa
commit 2891ff486a
2 changed files with 11 additions and 59 deletions
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42
examples/device/nrf52840/src/msc_flash_qspi.c
View File

@@ -47,19 +47,6 @@ void flash_flush (void);
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION // MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
enum
{
FLASH_STATE_IDLE,
FLASH_STATE_BUSY,
FLASH_STATE_COMPLETE
};
volatile uint8_t _fl_state = FLASH_STATE_IDLE;
void qspi_flash_complete (void)
{
_fl_state = FLASH_STATE_COMPLETE;
}
//------------- IMPLEMENTATION -------------// //------------- IMPLEMENTATION -------------//
// Callback invoked when received READ10 command. // Callback invoked when received READ10 command.
@@ -68,24 +55,8 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
{ {
uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset; uint32_t addr = lba * CFG_TUD_MSC_BLOCK_SZ + offset;
switch ( _fl_state ) flash_read(buffer, addr, bufsize);
{ return bufsize;
case FLASH_STATE_IDLE:
_fl_state = FLASH_STATE_BUSY;
flash_read(buffer, addr, bufsize);
return 0; // data not ready
case FLASH_STATE_BUSY:
return 0; // data not ready
case FLASH_STATE_COMPLETE:
_fl_state = FLASH_STATE_IDLE;
return bufsize;
default:
_fl_state = FLASH_STATE_IDLE;
return -1;
}
} }
// Callback invoked when received WRITE10 command. // Callback invoked when received WRITE10 command.
@@ -124,16 +95,7 @@ void flash_flush (void)
if ( _fl_addr == NO_CACHE ) return; if ( _fl_addr == NO_CACHE ) return;
TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, _fl_addr),); TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_erase(NRF_QSPI_ERASE_LEN_4KB, _fl_addr),);
while ( _fl_state != FLASH_STATE_COMPLETE )
{
}
_fl_state = FLASH_STATE_IDLE;
TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_write(_fl_buf, FLASH_PAGE_SIZE, _fl_addr),); TU_ASSERT(NRFX_SUCCESS == nrfx_qspi_write(_fl_buf, FLASH_PAGE_SIZE, _fl_addr),);
while ( _fl_state != FLASH_STATE_COMPLETE )
{
}
_fl_state = FLASH_STATE_IDLE;
_fl_addr = NO_CACHE; _fl_addr = NO_CACHE;
} }

28
hw/bsp/pca10056/board_pca10056.c
View File

@@ -77,23 +77,12 @@ uint32_t tusb_hal_millis(void)
/* BOARD API /* BOARD API
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
enum { enum {
QSPI_CMD_RSTEN = 0x66, QSPI_CMD_RSTEN = 0x66,
QSPI_CMD_RST = 0x99, QSPI_CMD_RST = 0x99,
QSPI_CMD_WRSR = 0x01, QSPI_CMD_WRSR = 0x01,
QSPI_CMD_READID = 0x90 QSPI_CMD_READID = 0x90
}; };
extern void qspi_flash_complete (void);
void qflash_hdl (nrfx_qspi_evt_t event, void * p_context)
{
(void) p_context;
(void) event;
qspi_flash_complete();
}
/* tinyusb function that handles power event (detected, ready, removed) /* tinyusb function that handles power event (detected, ready, removed)
* We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled. * We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
*/ */
@@ -143,7 +132,8 @@ void board_init(void)
.irq_priority = 7, .irq_priority = 7,
}; };
nrfx_qspi_init(&qspi_cfg, qflash_hdl, NULL); // NULL callback for blocking API
nrfx_qspi_init(&qspi_cfg, NULL, NULL);
nrf_qspi_cinstr_conf_t cinstr_cfg = { nrf_qspi_cinstr_conf_t cinstr_cfg = {
.opcode = 0, .opcode = 0,
@@ -180,10 +170,10 @@ void board_init(void)
uint8_t dev_id = (uint8_t) NRF_QSPI->CINSTRDAT1; uint8_t dev_id = (uint8_t) NRF_QSPI->CINSTRDAT1;
uint8_t mfgr_id = (uint8_t) ( NRF_QSPI->CINSTRDAT0 >> 24 ); uint8_t mfgr_id = (uint8_t) ( NRF_QSPI->CINSTRDAT0 >> 24 );
// Switch to qspi mode // Switch to quad mode
uint8_t sr_quad_en = 0x40; uint16_t sr_quad_en = 0x40;
cinstr_cfg.opcode = QSPI_CMD_WRSR; cinstr_cfg.opcode = QSPI_CMD_WRSR;
cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_2B; cinstr_cfg.length = 3;
cinstr_cfg.wipwait = cinstr_cfg.wren = true; cinstr_cfg.wipwait = cinstr_cfg.wren = true;
nrfx_qspi_cinstr_xfer(&cinstr_cfg, &sr_quad_en, NULL); nrfx_qspi_cinstr_xfer(&cinstr_cfg, &sr_quad_en, NULL);
#endif #endif