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Add stm32u545nucleo board.

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This commit is contained in:
Tinic Uro
2024-06-12 08:08:25 -07:00
parent 60d7fcb1ee
commit 28c2433375
6 changed files with 41 additions and 8 deletions
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1
hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
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@@ -6,5 +6,6 @@ LD_FILE = ${FAMILY_PATH}/linker/STM32U575xx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
MCU_VARIANT = stm32u575xx
# For flash-jlink target # For flash-jlink target
JLINK_DEVICE = stm32u575zi JLINK_DEVICE = stm32u575zi

1
hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk
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@@ -7,5 +7,6 @@ LD_FILE = ${BOARD_PATH}/STM32U5A5ZJTXQ_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u5a5xx.s SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u5a5xx.s
MCU_VARIANT = stm32u5a5xx
# For flash-jlink target # For flash-jlink target
JLINK_DEVICE = stm32u575zi JLINK_DEVICE = stm32u575zi

17
hw/bsp/stm32u5/family.c
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@@ -72,7 +72,9 @@ void board_init(void) {
__HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE(); __HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE(); __HAL_RCC_GPIOE_CLK_ENABLE();
#ifdef GPIOF
__HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOF_CLK_ENABLE();
#endif
__HAL_RCC_GPIOG_CLK_ENABLE(); __HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE();
@@ -140,6 +142,17 @@ void board_init(void) {
GPIO_InitStruct.Alternate = GPIO_AF10_USB; GPIO_InitStruct.Alternate = GPIO_AF10_USB;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
#ifdef USB_OTG_HS
// STM32U535/STM32U545
/* Enable USB power on Pwrctrl CR2 register */
HAL_PWREx_EnableVddUSB();
/* USB clock enable */
__HAL_RCC_USB_FS_CLK_ENABLE();
#endif
#ifdef USB_OTG_FS #ifdef USB_OTG_FS
#if CFG_TUSB_OS == OPT_OS_FREERTOS #if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
@@ -170,7 +183,9 @@ void board_init(void) {
/* USB clock enable */ /* USB clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE(); __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
#else #endif
#ifdef USB_OTG_HS
// STM59x/Ax/Fx/Gx only have 1 USB HS port // STM59x/Ax/Fx/Gx only have 1 USB HS port
#if CFG_TUSB_OS == OPT_OS_FREERTOS #if CFG_TUSB_OS == OPT_OS_FREERTOS

14
hw/bsp/stm32u5/family.cmake
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@@ -102,10 +102,16 @@ function(family_configure_example TARGET RTOS)
# Add TinyUSB target and port source # Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_STM32U5 ${RTOS}) family_add_tinyusb(${TARGET} OPT_MCU_STM32U5 ${RTOS})
target_sources(${TARGET}-tinyusb PUBLIC if ((${MCU_VARIANT} EQUAL "stm32u535xx") OR (${MCU_VARIANT} EQUAL "stm32u545xx"))
${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c target_sources(${TARGET}-tinyusb PUBLIC
#${TOP}/src/portable/st/typec/typec_stm32.c ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
) )
else ()
target_sources(${TARGET}-tinyusb PUBLIC
${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
#${TOP}/src/portable/st/typec/typec_stm32.c
)
endif ()
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
# Link dependencies # Link dependencies

14
hw/bsp/stm32u5/family.mk
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@@ -27,18 +27,28 @@ LDFLAGS_GCC += \
--specs=nosys.specs --specs=nano.specs --specs=nosys.specs --specs=nano.specs
SRC_C += \ SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_icache.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_icache.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
ifeq ($(MCU_VARIANT),stm32u545xx)
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
else ($(MCU_VARIANT),stm32u535xx)
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
else
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c
endif
INC += \ INC += \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(ST_CMSIS)/Include \ $(TOP)/$(ST_CMSIS)/Include \

2
src/portable/synopsys/dwc2/dwc2_stm32.h
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@@ -109,7 +109,7 @@ extern "C" {
// - Port0 to OTG_FS, and Port1 to OTG_HS // - Port0 to OTG_FS, and Port1 to OTG_HS
static const dwc2_controller_t _dwc2_controller[] = { static const dwc2_controller_t _dwc2_controller[] = {
#ifdef USB_OTG_FS_PERIPH_BASE #ifdef USB_OTG_FS_PERIPH_BASE
{ .reg_base = USB_OTG_FS_PERIPH_BASE, .irqnum = USB_OTG_FS_IRQN, .ep_count = EP_MAX_FS, .ep_fifo_size = EP_FIFO_SIZE_FS }, { .reg_base = USB_OTG_FS_PERIPH_BASE, .irqnum = OTG_FS_IRQn, .ep_count = EP_MAX_FS, .ep_fifo_size = EP_FIFO_SIZE_FS },
#endif #endif
#ifdef USB_OTG_HS_PERIPH_BASE #ifdef USB_OTG_HS_PERIPH_BASE