small changes & code style
This commit is contained in:
@@ -474,6 +474,7 @@ bool tuh_cdc_read_clear (uint8_t idx) {
|
|||||||
|
|
||||||
bool ret = tu_edpt_stream_clear(&p_cdc->stream.rx);
|
bool ret = tu_edpt_stream_clear(&p_cdc->stream.rx);
|
||||||
tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
|
tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -717,7 +718,9 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
|
|||||||
}
|
}
|
||||||
|
|
||||||
// invoke receive callback
|
// invoke receive callback
|
||||||
if (tuh_cdc_rx_cb) tuh_cdc_rx_cb(idx);
|
if (tuh_cdc_rx_cb) {
|
||||||
|
tuh_cdc_rx_cb(idx);
|
||||||
|
}
|
||||||
|
|
||||||
// prepare for next transfer if needed
|
// prepare for next transfer if needed
|
||||||
tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
|
tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
|
||||||
@@ -826,6 +829,7 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num) {
|
|||||||
xfer.user_data = 0; // initial state 0
|
xfer.user_data = 0; // initial state 0
|
||||||
|
|
||||||
serial_drivers[p_cdc->serial_drid].process_set_config(&xfer);
|
serial_drivers[p_cdc->serial_drid].process_set_config(&xfer);
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -886,11 +890,12 @@ static bool acm_set_control_line_state(cdch_interface_t* p_cdc, tuh_xfer_cb_t co
|
|||||||
.ep_addr = 0,
|
.ep_addr = 0,
|
||||||
.setup = &request,
|
.setup = &request,
|
||||||
.buffer = NULL,
|
.buffer = NULL,
|
||||||
.complete_cb = complete_cb ? acm_internal_control_complete : NULL, // complete_cb is NULL for sync call
|
.complete_cb = complete_cb ? acm_internal_control_complete : NULL,
|
||||||
.user_data = user_data
|
.user_data = user_data
|
||||||
};
|
};
|
||||||
|
|
||||||
TU_ASSERT(tuh_control_xfer(&xfer));
|
TU_ASSERT(tuh_control_xfer(&xfer));
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -917,16 +922,18 @@ static bool acm_set_line_coding(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_
|
|||||||
memcpy(enum_buf, &p_cdc->requested_line_coding, sizeof(cdc_line_coding_t));
|
memcpy(enum_buf, &p_cdc->requested_line_coding, sizeof(cdc_line_coding_t));
|
||||||
|
|
||||||
p_cdc->user_control_cb = complete_cb;
|
p_cdc->user_control_cb = complete_cb;
|
||||||
|
|
||||||
tuh_xfer_t xfer = {
|
tuh_xfer_t xfer = {
|
||||||
.daddr = p_cdc->daddr,
|
.daddr = p_cdc->daddr,
|
||||||
.ep_addr = 0,
|
.ep_addr = 0,
|
||||||
.setup = &request,
|
.setup = &request,
|
||||||
.buffer = enum_buf,
|
.buffer = enum_buf,
|
||||||
.complete_cb = complete_cb ? acm_internal_control_complete : NULL, // complete_cb is NULL for sync call
|
.complete_cb = complete_cb ? acm_internal_control_complete : NULL,
|
||||||
.user_data = user_data
|
.user_data = user_data
|
||||||
};
|
};
|
||||||
|
|
||||||
TU_ASSERT(tuh_control_xfer(&xfer));
|
TU_ASSERT(tuh_control_xfer(&xfer));
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -957,6 +964,7 @@ static bool acm_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint1
|
|||||||
|
|
||||||
cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
|
cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
|
||||||
TU_VERIFY(p_cdc);
|
TU_VERIFY(p_cdc);
|
||||||
|
|
||||||
p_cdc->serial_drid = SERIAL_DRIVER_ACM;
|
p_cdc->serial_drid = SERIAL_DRIVER_ACM;
|
||||||
|
|
||||||
//------------- Control Interface -------------//
|
//------------- Control Interface -------------//
|
||||||
@@ -1814,8 +1822,9 @@ static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t * p_cdc);
|
|||||||
|
|
||||||
//------------- Control Request -------------//
|
//------------- Control Request -------------//
|
||||||
|
|
||||||
static bool ch34x_set_request(cdch_interface_t* p_cdc, uint8_t direction, uint8_t request, uint16_t value,
|
static bool ch34x_set_request(cdch_interface_t * p_cdc, uint8_t direction, uint8_t request,
|
||||||
uint16_t index, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
|
uint16_t value, uint16_t index, uint8_t * buffer, uint16_t length,
|
||||||
|
tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
|
||||||
tusb_control_request_t const request_setup = {
|
tusb_control_request_t const request_setup = {
|
||||||
.bmRequestType_bit = {
|
.bmRequestType_bit = {
|
||||||
.recipient = TUSB_REQ_RCPT_DEVICE,
|
.recipient = TUSB_REQ_RCPT_DEVICE,
|
||||||
@@ -1861,7 +1870,8 @@ static inline bool ch34x_control_in(cdch_interface_t* p_cdc, uint8_t request, ui
|
|||||||
complete_cb, user_data);
|
complete_cb, user_data);
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline bool ch34x_write_reg(cdch_interface_t* p_cdc, uint16_t reg, uint16_t reg_value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
|
static inline bool ch34x_write_reg(cdch_interface_t * p_cdc, uint16_t reg, uint16_t reg_value,
|
||||||
|
tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
|
||||||
return ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, reg, reg_value, complete_cb, user_data);
|
return ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, reg, reg_value, complete_cb, user_data);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -2023,8 +2033,8 @@ static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uin
|
|||||||
}
|
}
|
||||||
|
|
||||||
static void ch34x_process_config(tuh_xfer_t* xfer) {
|
static void ch34x_process_config(tuh_xfer_t* xfer) {
|
||||||
// CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
|
|
||||||
uintptr_t const state = xfer->user_data;
|
uintptr_t const state = xfer->user_data;
|
||||||
|
// CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
|
||||||
uint8_t const itf_num = 0;
|
uint8_t const itf_num = 0;
|
||||||
uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
|
uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
|
||||||
cdch_interface_t * p_cdc = get_itf(idx);
|
cdch_interface_t * p_cdc = get_itf(idx);
|
||||||
@@ -2072,7 +2082,8 @@ static void ch34x_process_config(tuh_xfer_t* xfer) {
|
|||||||
case CONFIG_CH34X_MODEM_CONTROL:
|
case CONFIG_CH34X_MODEM_CONTROL:
|
||||||
#ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
|
#ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
|
||||||
p_cdc->requested_line_state = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
|
p_cdc->requested_line_state = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
|
||||||
TU_ASSERT_COMPLETE(ch34x_modem_ctrl_request(p_cdc, ch34x_internal_control_complete, CONFIG_CH34X_COMPLETE));
|
TU_ASSERT_COMPLETE(ch34x_modem_ctrl_request(p_cdc, ch34x_internal_control_complete,
|
||||||
|
CONFIG_CH34X_COMPLETE));
|
||||||
break;
|
break;
|
||||||
#else
|
#else
|
||||||
TU_ATTR_FALLTHROUGH;
|
TU_ATTR_FALLTHROUGH;
|
||||||
@@ -2431,6 +2442,7 @@ static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, u
|
|||||||
}
|
}
|
||||||
|
|
||||||
static void pl2303_process_config(tuh_xfer_t * xfer) {
|
static void pl2303_process_config(tuh_xfer_t * xfer) {
|
||||||
|
uintptr_t const state = xfer->user_data;
|
||||||
// PL2303 has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
|
// PL2303 has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
|
||||||
uint8_t const itf_num = 0;
|
uint8_t const itf_num = 0;
|
||||||
uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
|
uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
|
||||||
@@ -2440,7 +2452,7 @@ static void pl2303_process_config(tuh_xfer_t * xfer) {
|
|||||||
uint8_t buf;
|
uint8_t buf;
|
||||||
int8_t type;
|
int8_t type;
|
||||||
|
|
||||||
switch (xfer->user_data) {
|
switch (state) {
|
||||||
|
|
||||||
// from here sequence overtaken from Linux Kernel function pl2303_startup()
|
// from here sequence overtaken from Linux Kernel function pl2303_startup()
|
||||||
case CONFIG_PL2303_GET_DESC:
|
case CONFIG_PL2303_GET_DESC:
|
||||||
|
|||||||
Reference in New Issue
Block a user