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adding support for esp32 for use with max3421e host

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This commit is contained in:
hathach
2024-04-25 20:23:40 +07:00
parent fc91e15488
commit 2e995d7cf4
21 changed files with 94 additions and 49 deletions
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5
src/common/tusb_mcu.h
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@@ -329,6 +329,9 @@
#define TUP_USBIP_DWC2
#define TUP_DCD_ENDPOINT_MAX 6
#elif TU_CHECK_MCU(OPT_MCU_ESP32) && (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
#error "MCUs are only supported with CFG_TUH_MAX3421 enabled"
//--------------------------------------------------------------------+
// Dialog
//--------------------------------------------------------------------+
@@ -426,7 +429,7 @@
#define TUP_MCU_MULTIPLE_CORE 0
#endif
#ifndef TUP_DCD_ENDPOINT_MAX
#if CFG_TUD_ENABLED && !defined(TUP_DCD_ENDPOINT_MAX)
#warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8"
#define TUP_DCD_ENDPOINT_MAX 8
#endif

2
src/portable/analog/max3421/hcd_max3421.c
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@@ -484,8 +484,8 @@ bool hcd_init(uint8_t rhport) {
// v1 is 0x01, v2 is 0x12, v3 is 0x13
uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
TU_ASSERT(revision == 0x01 || revision == 0x12 || revision == 0x13, false);
TU_LOG2_HEX(revision);
TU_ASSERT(revision == 0x01 || revision == 0x12 || revision == 0x13, false);
// reset
reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);

2
src/tusb_option.h
View File

@@ -119,6 +119,8 @@
// Espressif
#define OPT_MCU_ESP32S2 900 ///< Espressif ESP32-S2
#define OPT_MCU_ESP32S3 901 ///< Espressif ESP32-S3
#define OPT_MCU_ESP32 902 ///< Espressif ESP32 (for host max3421e)
#define TUP_MCU_ESPRESSIF (CFG_TUSB_MCU >= 900 && CFG_TUSB_MCU < 1000) // check if Espressif MCU
// Dialog
#define OPT_MCU_DA1469X 1000 ///< Dialog Semiconductor DA1469x