update max3421 to have hcd_int_handler_ext()
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@@ -167,15 +167,30 @@ int board_getchar(void) {
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#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
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static spi_device_handle_t max3421_spi;
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SemaphoreHandle_t max3421_intr_sem;
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static void IRAM_ATTR max3421_isr_handler(void* arg) {
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(void) arg; // arg is gpio num
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//xQueueSendFromISR(gpio_evt_queue, &gpio_num, NULL);
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gpio_set_level(13, 1);
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tuh_int_handler(1);
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BaseType_t xHigherPriorityTaskWoken = pdFALSE;
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xSemaphoreGiveFromISR(max3421_intr_sem, &xHigherPriorityTaskWoken);
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if (xHigherPriorityTaskWoken) {
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portYIELD_FROM_ISR();
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}
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gpio_set_level(13, 0);
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}
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static void max3421_intr_task(void* param) {
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(void) param;
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while (1) {
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xSemaphoreTake(max3421_intr_sem, portMAX_DELAY);
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tuh_int_handler(BOARD_TUH_RHPORT);
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}
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}
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static void max3421_init(void) {
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// CS pin
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gpio_set_direction(MAX3421_CS_PIN, GPIO_MODE_OUTPUT);
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@@ -209,6 +224,9 @@ static void max3421_init(void) {
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gpio_set_level(13, 0);
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// Interrupt pin
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max3421_intr_sem = xSemaphoreCreateBinary();
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xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES-1, NULL);
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gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
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gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);
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