diff --git a/.travis.yml b/.travis.yml new file mode 100644 index 000000000..c3bf2bb5a --- /dev/null +++ b/.travis.yml @@ -0,0 +1,4 @@ +language: c +compiler: + - gcc +script: rake test:all \ No newline at end of file diff --git a/tests/test/host/ehci/test_ehci_init.c b/tests/test/host/ehci/test_ehci_init.c index 0026b1479..da4c6d3c9 100644 --- a/tests/test/host/ehci/test_ehci_init.c +++ b/tests/test/host/ehci/test_ehci_init.c @@ -51,6 +51,9 @@ usbh_device_info_t usbh_devices[TUSB_CFG_HOST_DEVICE_MAX+1]; +uint8_t dev_addr; +uint8_t hostid; + //--------------------------------------------------------------------+ // Setup/Teardown + helper declare //--------------------------------------------------------------------+ @@ -58,6 +61,16 @@ void setUp(void) { ehci_controller_init(); hcd_init(); + + dev_addr = 1; + hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX; + for (uint8_t i=0; iusb_int_enable_bit.usb_error); - TEST_ASSERT(regs->usb_int_enable_bit.port_change_detect); - TEST_ASSERT(regs->usb_int_enable_bit.async_advance); + //------------- USB INT Enable-------------// + TEST_ASSERT(regs->usb_int_enable_bit.usb_error); + TEST_ASSERT(regs->usb_int_enable_bit.port_change_detect); + TEST_ASSERT(regs->usb_int_enable_bit.async_advance); - TEST_ASSERT_FALSE(regs->usb_int_enable_bit.framelist_rollover); - TEST_ASSERT_FALSE(regs->usb_int_enable_bit.pci_host_system_error); + TEST_ASSERT_FALSE(regs->usb_int_enable_bit.framelist_rollover); + TEST_ASSERT_FALSE(regs->usb_int_enable_bit.pci_host_system_error); - TEST_ASSERT_FALSE(regs->usb_int_enable_bit.nxp_int_sof); - TEST_ASSERT_FALSE(regs->usb_int_enable_bit.usb); - TEST_ASSERT_TRUE(regs->usb_int_enable_bit.nxp_int_async); - TEST_ASSERT_TRUE(regs->usb_int_enable_bit.nxp_int_period); + TEST_ASSERT_FALSE(regs->usb_int_enable_bit.nxp_int_sof); + TEST_ASSERT_FALSE(regs->usb_int_enable_bit.usb); + TEST_ASSERT_TRUE(regs->usb_int_enable_bit.nxp_int_async); + TEST_ASSERT_TRUE(regs->usb_int_enable_bit.nxp_int_period); - // TODO to be portable use usbint instead of nxp int async/period - } + // TODO to be portable use usbint instead of nxp int async/period } void test_hcd_init_async_list(void) { - for(uint32_t i=0; iasync_list_base); - TEST_ASSERT_EQUAL_HEX(async_head, regs->async_list_base); + TEST_ASSERT_EQUAL_HEX(async_head, align32( (uint32_t) async_head) ); + TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type); + TEST_ASSERT_FALSE(async_head->next.terminate); - TEST_ASSERT_EQUAL_HEX(async_head, align32( (uint32_t) async_head) ); - TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type); - TEST_ASSERT_FALSE(async_head->next.terminate); - - TEST_ASSERT(async_head->head_list_flag); - TEST_ASSERT(async_head->qtd_overlay.halted); - } + TEST_ASSERT(async_head->head_list_flag); + TEST_ASSERT(async_head->qtd_overlay.halted); } void check_qhd_endpoint_link(ehci_link_t *p_prev, ehci_qhd_t *p_qhd) @@ -128,70 +133,56 @@ void check_qhd_endpoint_link(ehci_link_t *p_prev, ehci_qhd_t *p_qhd) void test_hcd_init_period_list(void) { #if EHCI_PERIODIC_LIST - for(uint32_t i=0; iperiodic_list_base); + + check_qhd_endpoint_link( framelist+0, period_head_arr+1); + check_qhd_endpoint_link( framelist+2, period_head_arr+1); + check_qhd_endpoint_link( framelist+4, period_head_arr+1); + check_qhd_endpoint_link( framelist+6, period_head_arr+1); + + check_qhd_endpoint_link( framelist+1, period_head_arr+2); + check_qhd_endpoint_link( framelist+5, period_head_arr+2); + + check_qhd_endpoint_link( framelist+3, period_head_arr+3); + check_qhd_endpoint_link( framelist+7, period_head_arr); + check_qhd_endpoint_link( (ehci_link_t*) (period_head_arr+1), period_head_arr); + check_qhd_endpoint_link( (ehci_link_t*) (period_head_arr+2), period_head_arr); + check_qhd_endpoint_link( (ehci_link_t*) (period_head_arr+3), period_head_arr); + + for(uint32_t i=0; i<4; i++) { - uint8_t const hostid = i+TEST_CONTROLLER_HOST_START_INDEX; - ehci_registers_t* const regs = get_operational_register(hostid); - ehci_qhd_t * const period_head_arr = get_period_head(hostid, 1); - ehci_link_t * const framelist = get_period_frame_list(hostid); - - TEST_ASSERT_EQUAL_HEX( (uint32_t) framelist, regs->periodic_list_base); - - check_qhd_endpoint_link( framelist+0, period_head_arr+1); - check_qhd_endpoint_link( framelist+2, period_head_arr+1); - check_qhd_endpoint_link( framelist+4, period_head_arr+1); - check_qhd_endpoint_link( framelist+6, period_head_arr+1); - - check_qhd_endpoint_link( framelist+1, period_head_arr+2); - check_qhd_endpoint_link( framelist+5, period_head_arr+2); - - check_qhd_endpoint_link( framelist+3, period_head_arr+3); - check_qhd_endpoint_link( framelist+7, period_head_arr); - check_qhd_endpoint_link( (ehci_link_t*) (period_head_arr+1), period_head_arr); - check_qhd_endpoint_link( (ehci_link_t*) (period_head_arr+2), period_head_arr); - check_qhd_endpoint_link( (ehci_link_t*) (period_head_arr+3), period_head_arr); - - for(uint32_t i=0; i<4; i++) - { - TEST_ASSERT(period_head_arr[i].interrupt_smask); - TEST_ASSERT(period_head_arr[i].qtd_overlay.halted); - } - - TEST_ASSERT_TRUE(period_head_arr[0].next.terminate); + TEST_ASSERT(period_head_arr[i].interrupt_smask); + TEST_ASSERT(period_head_arr[i].qtd_overlay.halted); } + + TEST_ASSERT_TRUE(period_head_arr[0].next.terminate); #endif } void test_hcd_init_tt_control(void) { - for(uint32_t i=0; itt_control); - } + ehci_registers_t* const regs = get_operational_register(hostid); } void test_hcd_init_usbcmd(void) { - for(uint32_t i=0; iusb_cmd_bit.async_enable); + TEST_ASSERT(regs->usb_cmd_bit.async_enable); #if EHCI_PERIODIC_LIST - TEST_ASSERT(regs->usb_cmd_bit.periodic_enable); + TEST_ASSERT(regs->usb_cmd_bit.periodic_enable); #else - TEST_ASSERT_FALSE(regs->usb_cmd_bit.periodic_enable); + TEST_ASSERT_FALSE(regs->usb_cmd_bit.periodic_enable); #endif - //------------- Framelist size (NXP specific) -------------// - TEST_ASSERT_BITS(BIN8(11), EHCI_CFG_FRAMELIST_SIZE_BITS, regs->usb_cmd_bit.framelist_size); - TEST_ASSERT_EQUAL(EHCI_CFG_FRAMELIST_SIZE_BITS >> 2, regs->usb_cmd_bit.nxp_framelist_size_msb); - } + //------------- Framelist size (NXP specific) -------------// + TEST_ASSERT_BITS(BIN8(11), EHCI_CFG_FRAMELIST_SIZE_BITS, regs->usb_cmd_bit.framelist_size); + TEST_ASSERT_EQUAL(EHCI_CFG_FRAMELIST_SIZE_BITS >> 2, regs->usb_cmd_bit.nxp_framelist_size_msb); } void test_hcd_init_portsc(void) diff --git a/tinyusb/host/usbh_hcd.h b/tinyusb/host/usbh_hcd.h index ec85fea89..fa676dfc9 100644 --- a/tinyusb/host/usbh_hcd.h +++ b/tinyusb/host/usbh_hcd.h @@ -67,7 +67,7 @@ #endif //--------------------------------------------------------------------+ -// USBH +// USBH-HCD common data structure //--------------------------------------------------------------------+ typedef struct ATTR_ALIGNED(4){ uint8_t core_id; @@ -106,7 +106,9 @@ typedef struct { // TODO internal structure, re-order members extern usbh_device_info_t usbh_devices[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address -//------------- callback from HCD ISR-------------// +//--------------------------------------------------------------------+ +// callback from HCD ISR +//--------------------------------------------------------------------+ void usbh_isr(pipe_handle_t pipe_hdl, uint8_t class_code, tusb_event_t event); void usbh_device_plugged_isr(uint8_t hostid); void usbh_device_unplugged_isr(uint8_t hostid);