use dwc2->fifo[]
This commit is contained in:
		@@ -53,7 +53,6 @@
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#define DWC2_REG(_port)       ((dwc2_regs_t*) DWC2_REG_BASE)
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					#define DWC2_REG(_port)       ((dwc2_regs_t*) DWC2_REG_BASE)
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#define EPIN_REG(_port)       (DWC2_REG(_port)->epin)
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					#define EPIN_REG(_port)       (DWC2_REG(_port)->epin)
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#define EPOUT_REG(_port)      (DWC2_REG(_port)->epout)
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					#define EPOUT_REG(_port)      (DWC2_REG(_port)->epout)
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#define FIFO_BASE(_port, _x)  ((volatile uint32_t*) (DWC2_REG_BASE + DWC2_FIFO_BASE + (_x) * DWC2_FIFO_SIZE))
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enum
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					enum
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{
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					{
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@@ -758,7 +757,8 @@ static void read_fifo_packet(uint8_t rhport, uint8_t * dst, uint16_t len)
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{
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					{
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  (void) rhport;
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					  (void) rhport;
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  volatile uint32_t * rx_fifo = FIFO_BASE(rhport, 0);
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					  dwc2_regs_t * dwc2 = DWC2_REG(rhport);
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					  volatile uint32_t * rx_fifo = dwc2->fifo[0];
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  // Reading full available 32 bit words from fifo
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					  // Reading full available 32 bit words from fifo
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  uint16_t full_words = len >> 2;
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					  uint16_t full_words = len >> 2;
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@@ -794,7 +794,8 @@ static void write_fifo_packet(uint8_t rhport, uint8_t fifo_num, uint8_t * src, u
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{
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					{
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  (void) rhport;
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					  (void) rhport;
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  volatile uint32_t * tx_fifo = FIFO_BASE(rhport, fifo_num);
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					  dwc2_regs_t * dwc2 = DWC2_REG(rhport);
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					  volatile uint32_t * tx_fifo = dwc2->fifo[fifo_num];
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  // Pushing full available 32 bit words to fifo
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					  // Pushing full available 32 bit words to fifo
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  uint16_t full_words = len >> 2;
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					  uint16_t full_words = len >> 2;
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@@ -822,9 +823,10 @@ static void write_fifo_packet(uint8_t rhport, uint8_t fifo_num, uint8_t * src, u
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  }
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					  }
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}
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					}
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static void handle_rxflvl_ints(uint8_t rhport, dwc2_epout_t * out_ep) {
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					static void handle_rxflvl_ints(uint8_t rhport, dwc2_epout_t * out_ep)
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					{
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  dwc2_regs_t * dwc2 = DWC2_REG(rhport);
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					  dwc2_regs_t * dwc2 = DWC2_REG(rhport);
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  volatile uint32_t * rx_fifo = FIFO_BASE(rhport, 0);
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					  volatile uint32_t * rx_fifo = dwc2->fifo[0];
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  // Pop control word off FIFO
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					  // Pop control word off FIFO
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  uint32_t ctl_word = dwc2->grxstsp;
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					  uint32_t ctl_word = dwc2->grxstsp;
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@@ -972,7 +974,7 @@ static void handle_epin_ints(uint8_t rhport, dwc2_regs_t * dwc2, dwc2_epin_t * i
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          // Push packet to Tx-FIFO
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					          // Push packet to Tx-FIFO
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          if (xfer->ff)
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					          if (xfer->ff)
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          {
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					          {
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            volatile uint32_t * tx_fifo = FIFO_BASE(rhport, n);
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					            volatile uint32_t * tx_fifo = dwc2->fifo[n];
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            tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *)(uintptr_t) tx_fifo, packet_size);
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					            tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *)(uintptr_t) tx_fifo, packet_size);
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          }
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					          }
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          else
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					          else
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@@ -164,6 +164,7 @@ union {
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           uint32_t reservede08[126]; // E08..FFF
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					           uint32_t reservede08[126]; // E08..FFF
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  //------------- FIFOs -------------//
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					  //------------- FIFOs -------------//
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					  // Word-accessed only using first pointer since it auto shift
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  volatile uint32_t fifo[16][0x400];  // 1000..FFFF Endpoint FIFO
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					  volatile uint32_t fifo[16][0x400];  // 1000..FFFF Endpoint FIFO
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} dwc2_regs_t;
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					} dwc2_regs_t;
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