fix trailing space and new line
temporarily disable codespell
This commit is contained in:
@@ -2,6 +2,6 @@
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**BridgeTek** provides a hardware abstraction library with software source code for the SDKs for FT9xx software family.
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Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`.
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Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`.
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Registers definition files, and included peripheral register definition files have licenses that allow for redistribution.
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Registers definition files, and included peripheral register definition files have licenses that allow for redistribution.
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@@ -50,11 +50,11 @@ _start:
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codestart:
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jmp init
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.global _exithook
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_exithook: # Debugger uses '_exithook' at 0x90 to catch program exit
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return
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init:
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# Disable all interrupts
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ldk $r0,0x80
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@@ -63,12 +63,12 @@ init:
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.else
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sta.b 0x100e3,$r0
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.endif
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# Reset all peripherals
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# lda.l $r0, 0x10018
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# bins.l $r0, $r0, 0x23F # Set bit 31
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# sta.l 0x10018, $r0
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# Initialize DATA by copying from program memory
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ldk.l $r0,__data_load_start
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ldk.l $r1,__data_load_end
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@@ -3,7 +3,5 @@
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**Dialog Semiconductors** provides SDKs for DA146x MCU family.
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Most of the files there can't be redistributed.
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Registers definition file `DA1469xAB.h` and some **ARM** originated headers are have licenses that allow
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for redistribution.
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for redistribution.
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Whole SDK repository can be downloaded from Dialog Semiconductor web page `https://www.dialog.com`
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@@ -24,4 +24,3 @@
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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---------------------------------------------------------------------------*/
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@@ -268,4 +268,3 @@
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#endif /* __CMSIS_COMPILER_H */
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@@ -47,9 +47,9 @@
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#ifndef __STATIC_INLINE
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#define __STATIC_INLINE static inline
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#endif
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#ifndef __STATIC_FORCEINLINE
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#ifndef __STATIC_FORCEINLINE
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#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
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#endif
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#endif
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#ifndef __NO_RETURN
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#define __NO_RETURN __attribute__((__noreturn__))
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#endif
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@@ -586,7 +586,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
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Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
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Stack Pointer Limit register hence zero is returned always in non-secure
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mode.
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\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
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\return PSPLIM Register value
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*/
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@@ -631,7 +631,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
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Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
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Stack Pointer Limit register hence the write is silently ignored in non-secure
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mode.
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\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
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\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
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*/
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@@ -768,7 +768,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
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{
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#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
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(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
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#if __has_builtin(__builtin_arm_get_fpscr)
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#if __has_builtin(__builtin_arm_get_fpscr)
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// Re-enable using built-in when GCC has been fixed
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// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
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/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
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@@ -62,7 +62,7 @@
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*/
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#include "cmsis_version.h"
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/* CMSIS CM0 definitions */
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#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */
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#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */
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@@ -2065,7 +2065,7 @@ typedef struct
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/* Special LR values for Secure/Non-Secure call handling and exception handling */
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/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
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/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
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#define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
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/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
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@@ -2080,7 +2080,7 @@ typedef struct
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/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
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#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U) /* Value for processors with floating-point extension: */
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#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL) /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
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#else
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#else
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#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL) /* Value for processors without floating-point extension */
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#endif
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@@ -103,7 +103,7 @@
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(MPU_RLAR_EN_Msk))
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#if defined(MPU_RLAR_PXN_Pos)
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/** \brief Region Limit Address Register with PXN value
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* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
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* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
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@@ -114,7 +114,7 @@
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((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
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((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
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(MPU_RLAR_EN_Msk))
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#endif
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/**
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@@ -124,7 +124,7 @@ typedef struct {
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uint32_t RBAR; /*!< Region Base Address Register value */
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uint32_t RLAR; /*!< Region Limit Address Register value */
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} ARM_MPU_Region_t;
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/** Enable the MPU.
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* \param MPU_Control Default access permissions for unconfigured regions.
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*/
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@@ -185,11 +185,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at
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const uint8_t reg = idx / 4U;
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const uint32_t pos = ((idx % 4U) * 8U);
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const uint32_t mask = 0xFFU << pos;
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if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
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return; // invalid index
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}
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mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
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}
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@@ -236,7 +236,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
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* \param rnr Region number to be cleared.
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*/
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__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
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{
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{
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ARM_MPU_ClrRegionEx(MPU_NS, rnr);
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}
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#endif
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@@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
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* \param rnr Region number to be configured.
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* \param rbar Value for RBAR register.
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* \param rlar Value for RLAR register.
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*/
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*/
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__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
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{
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mpu->RNR = rnr;
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@@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r
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* \param rnr Region number to be configured.
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* \param rbar Value for RBAR register.
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* \param rlar Value for RLAR register.
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*/
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*/
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__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
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{
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ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
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@@ -269,10 +269,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla
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* \param rnr Region number to be configured.
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* \param rbar Value for RBAR register.
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* \param rlar Value for RLAR register.
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*/
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*/
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__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
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{
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ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
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ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
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}
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#endif
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@@ -284,7 +284,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
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__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
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{
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uint32_t i;
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for (i = 0U; i < len; ++i)
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for (i = 0U; i < len; ++i)
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{
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dst[i] = src[i];
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}
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@@ -296,7 +296,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
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* \param table Pointer to the MPU configuration table.
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* \param cnt Amount of regions to be configured.
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*/
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__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
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__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
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{
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const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
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if (cnt == 1U) {
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@@ -305,7 +305,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
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} else {
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uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
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uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
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mpu->RNR = rnrBase;
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while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
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uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
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@@ -316,7 +316,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
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rnrBase += MPU_TYPE_RALIASES;
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mpu->RNR = rnrBase;
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}
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ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
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}
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}
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@@ -326,7 +326,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
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* \param table Pointer to the MPU configuration table.
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* \param cnt Amount of regions to be configured.
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*/
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__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
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__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
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{
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ARM_MPU_LoadEx(MPU, rnr, table, cnt);
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}
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@@ -337,11 +337,10 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u
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* \param table Pointer to the MPU configuration table.
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* \param cnt Amount of regions to be configured.
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*/
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__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
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__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
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{
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ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
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}
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#endif
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#endif
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@@ -225,4 +225,3 @@ SECTIONS
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/* Check that intvect is at the beginning of RAM */
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ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
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}
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@@ -162,4 +162,3 @@ void mcu_gpio_exit_sleep(void);
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#endif
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#endif /* __MCU_MCU_H_ */
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@@ -539,7 +539,7 @@ SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_v
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/**@brief Remove a Vendor Specific base UUID.
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*
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*
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* @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows
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* the application to reuse memory allocated for Vendor Specific base UUIDs.
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*
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@@ -1666,7 +1666,7 @@ SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr
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*
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* @retval ::NRF_SUCCESS Address successfully retrieved.
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* @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied.
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* @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found.
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* @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found.
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* @retval ::NRF_ERROR_INVALID_STATE The advertising set is currently not advertising.
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*/
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SVCALL(SD_BLE_GAP_ADV_ADDR_GET, uint32_t, sd_ble_gap_adv_addr_get(uint8_t adv_handle, ble_gap_addr_t *p_addr));
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