hw/h7rs: Enable D-Cache in BSP
Signed-off-by: HiFiPhile <admin@hifiphile.com>
This commit is contained in:
@@ -78,6 +78,11 @@ void OTG_HS_IRQHandler(void) {
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//--------------------------------------------------------------------+
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void board_init(void) {
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SCB_EnableICache();
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SCB_EnableDCache();
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HAL_Init();
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board_clock_init();
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// Enable All GPIOs clocks
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@@ -98,6 +98,11 @@ static void trace_etm_init(void) {
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#endif
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void board_init(void) {
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SCB_EnableICache();
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SCB_EnableDCache();
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HAL_Init();
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// Implemented in board.h
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SystemClock_Config();
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@@ -124,9 +124,13 @@ void log_swo_init(void)
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#endif
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void board_init(void) {
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SCB_EnableICache();
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SCB_EnableDCache();
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HAL_Init();
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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// Implemented in board.h
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SystemClock_Config();
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