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fix(dcd/dwc2): Fix reset procedure for versions >=4.20a

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This commit is contained in:
Tomas Rezucha
2025-08-28 15:35:55 +02:00
parent edf188280a
commit 38f41f5fa2
1 changed files with 6 additions and 3 deletions
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9
src/portable/synopsys/dwc2/dwc2_common.c
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@@ -1,7 +1,7 @@
/* /*
* The MIT License (MIT) * The MIT License (MIT)
* *
* Copyright (c) 2024 Ha Thach (tinyusb.org) * Copyright (c) 2024-2025 Ha Thach (tinyusb.org)
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy * Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal * of this software and associated documentation files (the "Software"), to deal
@@ -45,11 +45,14 @@
// //
//-------------------------------------------------------------------- //--------------------------------------------------------------------
static void reset_core(dwc2_regs_t* dwc2) { static void reset_core(dwc2_regs_t* dwc2) {
// load gsnpsid (it is not readable after reset is asserted)
uint32_t gsnpsid = dwc2->gsnpsid;
// reset core // reset core
dwc2->grstctl |= GRSTCTL_CSRST; dwc2->grstctl |= GRSTCTL_CSRST;
if ((dwc2->gsnpsid & DWC2_CORE_REV_MASK) < (DWC2_CORE_REV_4_20a & DWC2_CORE_REV_MASK)) { if ((gsnpsid & DWC2_CORE_REV_MASK) < (DWC2_CORE_REV_4_20a & DWC2_CORE_REV_MASK)) {
// prior v42.0 CSRST is self-clearing // prior v4.20a CSRST is self-clearing
while (dwc2->grstctl & GRSTCTL_CSRST) {} while (dwc2->grstctl & GRSTCTL_CSRST) {}
} else { } else {
// From v4.20a CSRST bit is write only, CSRT_DONE (w1c) is introduced for checking. // From v4.20a CSRST bit is write only, CSRT_DONE (w1c) is introduced for checking.