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the family name error of at32 has been corrected

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This commit is contained in:
zhiqiang
2025-09-05 09:57:38 +08:00
parent f6ca80ab13
commit 3b983cb3e9
2 changed files with 6 additions and 2 deletions
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2
docs/reference/boards.rst
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@@ -41,7 +41,7 @@ at_start_f413 AT-START-F413 at32f413 https://www.arterychip.com/en/pro
at_start_f415 AT-START-F415 at32f415 https://www.arterychip.com/en/product/AT32F415.jsp
at_start_f423 AT-START-F423 at32f423 https://www.arterychip.com/en/product/AT32F423.jsp
at_start_f425 AT-START-F425 at32f425 https://www.arterychip.com/en/product/AT32F425.jsp
at_start_f435 AT-START-F435 at32f435_435 https://www.arterychip.com/en/product/AT32F435.jsp
at_start_f435 AT-START-F435 at32f435_437 https://www.arterychip.com/en/product/AT32F435.jsp
at_start_f437 AT-START-F437 at32f435_437 https://www.arterychip.com/en/product/AT32F437.jsp
============== ============== ============= ================================================== ======

6
hw/bsp/at32f402_405/family.c
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@@ -163,7 +163,11 @@ void usb_clock48m_select(usb_clk48_s clk_s)
void usb_gpio_config(void)
{
/*if needed*/
/* When the USB clock is enabled, the hardware will automatically
configure the pins; but other special pins that need to be used,
such as the pins used to detect VBUS or the pins that output the
SOF signal, still need to be configured separately, and these pins
are usually not required */
}
/**