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rename OPT_MODE_

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This commit is contained in:
hathach
2018-04-12 13:17:58 +07:00
parent 08a24ee224
commit 3d31f92106
11 changed files with 35 additions and 35 deletions
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4
tinyusb/portable/nxp/lpc43xx_lpc18xx/dcd_lpc43xx.c
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@@ -70,11 +70,11 @@ typedef struct {
extern ATTR_WEAK dcd_data_t dcd_data0;
extern ATTR_WEAK dcd_data_t dcd_data1;
#if (CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_DEVICE)
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data0;
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_DEVICE)
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data1;
#endif

6
tinyusb/portable/nxp/lpc43xx_lpc18xx/hal_lpc43xx.c
View File

@@ -93,7 +93,7 @@ bool tusb_hal_init(void)
// reset controller & set role
hal_controller_reset(0);
#if CFG_TUSB_CONTROLLER_0_MODE & TUSB_MODE_HOST
#if CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST
LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB0->USBMODE_D = LPC43XX_USBMODE_DEVICE;
@@ -111,11 +111,11 @@ bool tusb_hal_init(void)
/* connect CLK_USB1 to 60 MHz clock */
CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
LPC_SCU->SFSUSB = (CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
LPC_SCU->SFSUSB = (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
hal_controller_reset(1);
#if CFG_TUSB_CONTROLLER_1_MODE & TUSB_MODE_HOST
#if CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST
LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE;