From 3d3bf45102ded992fc10be09f3e9b9c981379ad1 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 24 Feb 2024 00:36:07 +0700 Subject: [PATCH] frdm k64f usb work well, add kinetis_k to ci cmake --- .github/workflows/cmake_arm.yml | 2 +- .../kinetis_k/boards/frdm_k64f/frdm_k64f.mex | 43 +++++++++++++++++-- hw/bsp/kinetis_k/family.c | 4 +- hw/bsp/kinetis_k/family.cmake | 1 + hw/bsp/kinetis_k/family.mk | 1 + src/portable/chipidea/ci_fs/ci_fs_kinetis.h | 6 +-- src/portable/chipidea/ci_fs/dcd_ci_fs.c | 8 ++++ src/portable/nxp/khci/dcd_khci.c | 14 ++---- 8 files changed, 60 insertions(+), 19 deletions(-) diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml index f97645ad1..80ab1ea71 100644 --- a/.github/workflows/cmake_arm.yml +++ b/.github/workflows/cmake_arm.yml @@ -38,7 +38,7 @@ jobs: family: # Alphabetical order - 'imxrt' - - 'kinetis_kl' + - 'kinetis_k kinetis_kl' - 'lpc17 lpc18 lpc40 lpc43' - 'lpc54 lpc55' - 'mcx' diff --git a/hw/bsp/kinetis_k/boards/frdm_k64f/frdm_k64f.mex b/hw/bsp/kinetis_k/boards/frdm_k64f/frdm_k64f.mex index 28d1ea612..4a8c77f95 100644 --- a/hw/bsp/kinetis_k/boards/frdm_k64f/frdm_k64f.mex +++ b/hw/bsp/kinetis_k/boards/frdm_k64f/frdm_k64f.mex @@ -732,15 +732,27 @@ - + - true + true + + + + + 2.8.0 + + + + + + + 14.0.0 @@ -755,6 +767,31 @@ true + + + true + + + + + true + + + + + 0 + + + + + true + + + + + true + + @@ -789,7 +826,7 @@ - + diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c index 38cfc45e3..6df29c1fc 100644 --- a/hw/bsp/kinetis_k/family.c +++ b/hw/bsp/kinetis_k/family.c @@ -30,6 +30,7 @@ #include "fsl_port.h" #include "fsl_clock.h" #include "fsl_uart.h" +#include "fsl_sysmpu.h" #include "board/clock_config.h" #include "board/pin_mux.h" @@ -50,6 +51,7 @@ void board_init(void) { BOARD_InitBootPins(); BOARD_BootClockRUN(); SystemCoreClockUpdate(); + SYSMPU_Enable(SYSMPU, 0); #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer @@ -84,7 +86,7 @@ void board_init(void) { #endif // USB - CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0, CLOCK_GetFreq(kCLOCK_PllFllSelClk)); + // USB clock is configured in BOARD_BootClockRUN() } //--------------------------------------------------------------------+ diff --git a/hw/bsp/kinetis_k/family.cmake b/hw/bsp/kinetis_k/family.cmake index 6d642c101..e0b5fcfc8 100644 --- a/hw/bsp/kinetis_k/family.cmake +++ b/hw/bsp/kinetis_k/family.cmake @@ -40,6 +40,7 @@ function(add_board_target BOARD_TARGET) ${SDK_DIR}/drivers/gpio ${SDK_DIR}/drivers/port ${SDK_DIR}/drivers/smc + ${SDK_DIR}/drivers/sysmpu ${SDK_DIR}/drivers/uart ) diff --git a/hw/bsp/kinetis_k/family.mk b/hw/bsp/kinetis_k/family.mk index de352a6a9..995873eec 100644 --- a/hw/bsp/kinetis_k/family.mk +++ b/hw/bsp/kinetis_k/family.mk @@ -29,6 +29,7 @@ INC += \ $(TOP)/$(SDK_DIR)/drivers/gpio \ $(TOP)/$(SDK_DIR)/drivers/port \ $(TOP)/$(SDK_DIR)/drivers/smc \ + $(TOP)/$(SDK_DIR)/drivers/sysmpu \ $(TOP)/$(SDK_DIR)/drivers/uart \ SRC_S += ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S diff --git a/src/portable/chipidea/ci_fs/ci_fs_kinetis.h b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h index cd21af1c7..31e14a546 100644 --- a/src/portable/chipidea/ci_fs/ci_fs_kinetis.h +++ b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h @@ -36,14 +36,12 @@ #define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE) #define CI_REG CI_FS_REG(0) -void dcd_int_enable(uint8_t rhport) -{ +void dcd_int_enable(uint8_t rhport) { (void) rhport; NVIC_EnableIRQ(USB0_IRQn); } -void dcd_int_disable(uint8_t rhport) -{ +void dcd_int_disable(uint8_t rhport) { (void) rhport; NVIC_DisableIRQ(USB0_IRQn); } diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c index 9327e09d8..4b1d488b5 100644 --- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c +++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c @@ -271,9 +271,17 @@ void dcd_init(uint8_t rhport) { (void) rhport; + // save crystal-less setting (recovery clock) + uint32_t clk_recover_irc_en = CI_REG->CLK_RECOVER_IRC_EN; + uint32_t clk_recover_ctrl = CI_REG->CLK_RECOVER_CTRL;; + CI_REG->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; while (CI_REG->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + // restore crystal-less setting + CI_REG->CLK_RECOVER_IRC_EN = clk_recover_irc_en; + CI_REG->CLK_RECOVER_CTRL |= clk_recover_ctrl; + tu_memclr(&_dcd, sizeof(_dcd)); CI_REG->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */ CI_REG->BDT_PAGE1 = (uint8_t)((uintptr_t)_dcd.bdt >> 8); diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c index 5a2f768b3..5d04a524a 100644 --- a/src/portable/nxp/khci/dcd_khci.c +++ b/src/portable/nxp/khci/dcd_khci.c @@ -269,22 +269,16 @@ void dcd_init(uint8_t rhport) { (void) rhport; -#if (CFG_TUSB_MCU == OPT_MCU_KINETIS_K) - uint32_t clk_recover_irc_en; - uint32_t clk_recover_ctrl; - - clk_recover_irc_en = KHCI->CLK_RECOVER_IRC_EN; - clk_recover_ctrl = KHCI->CLK_RECOVER_CTRL; + // save crystal-less setting (recovery clock) + uint32_t clk_recover_irc_en = KHCI->CLK_RECOVER_IRC_EN; + uint32_t clk_recover_ctrl = KHCI->CLK_RECOVER_CTRL; KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); + // restore crystal-less setting KHCI->CLK_RECOVER_IRC_EN = clk_recover_irc_en; KHCI->CLK_RECOVER_CTRL |= clk_recover_ctrl; -#else - KHCI->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; - while (KHCI->USBTRC0 & USB_USBTRC0_USBRESET_MASK); -#endif tu_memclr(&_dcd, sizeof(_dcd)); KHCI->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */