remove commented code
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		@@ -770,8 +770,6 @@ static void handle_rxflvl_irq(uint8_t rhport) {
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}
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static void handle_epout_slave(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepint_bm) {
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  // dwc2_regs_t* dwc2 = DWC2_REG(rhport);
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  if (doepint_bm.setup_phase_done) {
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    dcd_event_setup_received(rhport, (uint8_t*) _setup_packet, true);
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    return;
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@@ -882,8 +880,6 @@ static void handle_epout_dma(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepi
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}
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static void handle_epin_dma(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diepint_bm) {
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  // dwc2_regs_t* dwc2 = DWC2_REG(rhport);
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  // dwc2_dep_t* epin = &dwc2->epin[epnum];
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  xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_IN);
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  if (diepint_bm.xfer_complete) {
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@@ -921,7 +917,6 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
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      epout->intr = intr.value; // Clear interrupt
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      // print_doepint(doepint);
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      if (is_dma) {
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        #if CFG_TUD_DWC2_DMA_ENABLE
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        if (dir == TUSB_DIR_IN) {
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@@ -1034,12 +1029,6 @@ void dcd_int_handler(uint8_t rhport) {
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    // IEPINT bit read-only, clear using DIEPINTn
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    handle_ep_irq(rhport, TUSB_DIR_IN);
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  }
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  //  // Check for Incomplete isochronous IN transfer
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  //  if(int_status & GINTSTS_IISOIXFR) {
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  //    printf("      IISOIXFR!\r\n");
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  ////    TU_LOG(DWC2_DEBUG, "      IISOIXFR!\r\n");
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  //  }
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}
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#if CFG_TUD_TEST_MODE
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