add coreid to hidd_init
temporarily implement hidd_init using dcd from lpc17xx add more test for dcd lp176x implement dcd_endpoint_configure
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		@@ -53,6 +53,7 @@
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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STATIC_ dcd_dma_descriptor_t* dcd_udca[32] ATTR_ALIGNED(128) TUSB_CFG_ATTR_USBRAM;
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STATIC_ dcd_dma_descriptor_t  dcd_dd[DCD_MAX_DD];
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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@@ -71,7 +72,9 @@ static inline void sie_commamd_code (uint8_t phase, uint8_t code_data)
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  LPC_USB->USBCmdCode = (phase << 8) | (code_data << 16);
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  uint32_t const wait_flag = (phase == SIE_CMDPHASE_READ) ? DEV_INT_COMMAND_DATA_FULL_MASK : DEV_INT_COMMAND_CODE_EMPTY_MASK;
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#ifndef _TEST_
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  while ((LPC_USB->USBDevIntSt & wait_flag) == 0); // TODO blocking forever potential
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#endif
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  LPC_USB->USBDevIntClr = wait_flag;
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}
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@@ -195,7 +198,10 @@ tusb_error_t dcd_init(void)
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  // step 6 : set up control endpoint
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  endpoint_set_max_packet_size(0, TUSB_CFG_DEVICE_CONTROL_PACKET_SIZE);
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  endpoint_set_max_packet_size(1, TUSB_CFG_DEVICE_CONTROL_PACKET_SIZE);
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#ifndef _TEST_
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	while ((LPC_USB->USBDevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0);
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#endif
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	// step 7 : slave mode set up
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	LPC_USB->USBEpIntEn   = (uint32_t) BIN8(11); // control endpoint cannot use DMA, non-control all use DMA
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@@ -215,7 +221,7 @@ tusb_error_t dcd_init(void)
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	for (uint8_t index = 0; index < DCD_MAX_DD; index++)
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	{
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		dcd_udca[index] = 0;
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		dcd_udca[index] = dcd_dd + index;
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	}
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	LPC_USB->USBUDCAH    = (uint32_t) dcd_udca;
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	LPC_USB->USBDMAIntEn = (DMA_INT_END_OF_XFER_MASK | DMA_INT_NEW_DD_REQUEST_MASK | DMA_INT_ERROR_MASK );
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@@ -227,8 +233,35 @@ tusb_error_t dcd_init(void)
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  return TUSB_ERROR_NONE;
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}
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static inline uint8_t endpoint_address_to_physical_index(uint8_t ep_address) ATTR_ALWAYS_INLINE ATTR_CONST;
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static inline uint8_t endpoint_address_to_physical_index(uint8_t ep_address)
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{
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  return (ep_address << 1) + (ep_address & 0x80 ? 1 : 0 );
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}
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tusb_error_t dcd_endpoint_configure(uint8_t coreid, tusb_descriptor_endpoint_t const * p_endpoint_desc)
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{
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  uint8_t phy_ep = endpoint_address_to_physical_index( p_endpoint_desc->bEndpointAddress );
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  //------------- Realize Endpoint with Max Packet Size -------------//
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  LPC_USB->USBReEp |= BIT_(phy_ep);
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  endpoint_set_max_packet_size(phy_ep, p_endpoint_desc->wMaxPacketSize.size);
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#ifndef _TEST_
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	while ((LPC_USB->USBDevIntSt & DEV_INT_ENDPOINT_REALIZED_MASK) == 0) {} // TODO can be omitted
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#endif
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	LPC_USB->USBDevIntClr = DEV_INT_ENDPOINT_REALIZED_MASK;
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	//------------- DMA set up -------------//
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	memclr_(dcd_dd + phy_ep, sizeof(dcd_dma_descriptor_t));
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	dcd_dd[phy_ep].is_isochronous  = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) ? 1 : 0;
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	dcd_dd[phy_ep].max_packet_size = p_endpoint_desc->wMaxPacketSize.size;
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	dcd_dd[phy_ep].is_retired      = 1; // dd is not active at first
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	LPC_USB->USBEpDMAEn = BIT_(phy_ep);
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	sie_command_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+phy_ep, 1, 0); // clear all endpoint status
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  return TUSB_ERROR_NONE;
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}
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@@ -276,6 +309,7 @@ tusb_error_t dcd_pipe_control_read(uint8_t coreid)
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  return TUSB_ERROR_NONE;
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}
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// TODO inline function
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void dcd_pipe_control_write_zero_length(uint8_t coreid)
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{
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  dcd_pipe_control_write(coreid, NULL, 0);
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@@ -59,7 +59,7 @@ typedef struct
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	uint32_t next;
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	//------------- Word 1 -------------//
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	uint16_t mode            : 2; // either normal or ATLE(auto length extraction)
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	uint16_t mode            : 2; // either 00 normal or 01 ATLE(auto length extraction)
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	uint16_t is_next_valid   : 1;
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	uint16_t                 : 1;
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	uint16_t is_isochronous  : 1; // is an iso endpoint
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@@ -83,11 +83,12 @@ typedef struct
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//	uint32_t iso_packet_size_addr;		// iso only, can be omitted for non-iso
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} ATTR_ALIGNED(4) dcd_dma_descriptor_t;
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#define DCD_MAX_DD 10 // TODO scale with configure
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typedef struct {
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  dcd_dma_descriptor_t dd[DCD_MAX_DD];
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#define DCD_MAX_DD 32 // TODO scale with configure
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}dcd_data_t;
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//typedef struct {
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//  dcd_dma_descriptor_t dd[DCD_MAX_DD];
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//
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//}dcd_data_t;
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//--------------------------------------------------------------------+
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// Register Interface
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@@ -188,6 +189,16 @@ enum {
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  SIE_ENDPOINT_STATUS_BUFFER2_FULL_MASK       = BIT_(6)
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};
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//------------- DMA Descriptor Status -------------//
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enum {
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  DD_STATUS_NOT_SERVICED = 0,
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  DD_STATUS_BEING_SERVICED,
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  DD_STATUS_NORMAL,
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  DD_STATUS_DATA_UNDERUN, // short packet
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  DD_STATUS_DATA_OVERRUN,
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  DD_STATUS_SYSTEM_ERROR
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};
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#ifdef __cplusplus
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 }
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#endif
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@@ -158,11 +158,11 @@ tusb_error_t usbd_init (void)
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  uint16_t length = 0;
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  #if TUSB_CFG_DEVICE_HID_KEYBOARD
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  ASSERT_STATUS( hidd_init(&app_tusb_desc_configuration.keyboard_interface, &length) );
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  ASSERT_STATUS( hidd_init(0, &app_tusb_desc_configuration.keyboard_interface, &length) );
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  #endif
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  #if TUSB_CFG_DEVICE_HID_MOUSE
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  ASSERT_STATUS( hidd_init(&app_tusb_desc_configuration.mouse_interface, &length) );
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  #if TUSB_CFG_DEVICE_HID_MOUSE && 0
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  ASSERT_STATUS( hidd_init(0, &app_tusb_desc_configuration.mouse_interface, &length) );
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  #endif
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  usbd_bus_reset(0);
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