andy/tinyUSB
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Flush FIFO on bus reset.

Browse Source
This commit is contained in:
HiFiPhile
2023-11-23 19:20:03 +01:00
committed by hathach
parent cab1106416
commit 4116a962a6
1 changed files with 8 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/portable/synopsys/dwc2/dcd_dwc2.c
View File

@@ -139,6 +139,14 @@ static void bus_reset(uint8_t rhport) {
dwc2->epout[n].doepctl |= DOEPCTL_SNAK; dwc2->epout[n].doepctl |= DOEPCTL_SNAK;
} }
// flush all TX fifo and wait for it cleared
dwc2->grstctl = GRSTCTL_TXFFLSH | (0x10u << GRSTCTL_TXFNUM_Pos);
while (dwc2->grstctl & GRSTCTL_TXFFLSH_Msk) {}
// flush RX fifo and wait for it cleared
dwc2->grstctl = GRSTCTL_RXFFLSH;
while (dwc2->grstctl & GRSTCTL_RXFFLSH_Msk) {}
// 2. Set up interrupt mask // 2. Set up interrupt mask
dwc2->daintmsk = TU_BIT(DAINTMSK_OEPM_Pos) | TU_BIT(DAINTMSK_IEPM_Pos); dwc2->daintmsk = TU_BIT(DAINTMSK_OEPM_Pos) | TU_BIT(DAINTMSK_IEPM_Pos);
dwc2->doepmsk = DOEPMSK_STUPM | DOEPMSK_XFRCM; dwc2->doepmsk = DOEPMSK_STUPM | DOEPMSK_XFRCM;