Merge remote-tracking branch 'remotes/tinyusb/master' into pr/2227
This commit is contained in:
		| @@ -62,7 +62,9 @@ TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) | ||||
| typedef enum | ||||
| { | ||||
|   TU_FIFO_COPY_INC,            ///< Copy from/to an increasing source/destination address - default mode | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
|   TU_FIFO_COPY_CST_FULL_WORDS, ///< Copy from/to a constant source/destination address - required for e.g. STM32 to write into USB hardware FIFO | ||||
| #endif | ||||
| } tu_fifo_copy_mode_t; | ||||
|  | ||||
| bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable) | ||||
| @@ -92,6 +94,7 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si | ||||
| // Pull & Push | ||||
| //--------------------------------------------------------------------+ | ||||
|  | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
| // Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address | ||||
| // Code adapted from dcd_synopsys.c | ||||
| // TODO generalize with configurable 1 byte or 4 byte each read | ||||
| @@ -140,6 +143,7 @@ static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t | ||||
|     *reg_tx = tmp32; | ||||
|   } | ||||
| } | ||||
| #endif | ||||
|  | ||||
| // send one item to fifo WITHOUT updating write pointer | ||||
| static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel) | ||||
| @@ -179,7 +183,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t | ||||
|         memcpy(f->buffer, ((uint8_t const*) app_buf) + lin_bytes, wrap_bytes); | ||||
|       } | ||||
|       break; | ||||
|  | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
|     case TU_FIFO_COPY_CST_FULL_WORDS: | ||||
|       // Intended for hardware buffers from which it can be read word by word only | ||||
|       if(n <= lin_count) | ||||
| @@ -224,6 +228,7 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t | ||||
|         if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); | ||||
|       } | ||||
|       break; | ||||
| #endif | ||||
|     default: break; | ||||
|   } | ||||
| } | ||||
| @@ -265,7 +270,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, | ||||
|         memcpy((uint8_t*) app_buf + lin_bytes, f->buffer, wrap_bytes); | ||||
|       } | ||||
|     break; | ||||
|  | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
|     case TU_FIFO_COPY_CST_FULL_WORDS: | ||||
|       if ( n <= lin_count ) | ||||
|       { | ||||
| @@ -310,6 +315,7 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, | ||||
|         // Read data wrapped part | ||||
|         if (wrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes); | ||||
|       } | ||||
| #endif | ||||
|     break; | ||||
|  | ||||
|     default: break; | ||||
| @@ -727,10 +733,29 @@ uint16_t tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n) | ||||
|   return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_INC); | ||||
| } | ||||
|  | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
| /******************************************************************************/ | ||||
| /*! | ||||
|     @brief This function will read n elements from the array index specified by | ||||
|     the read pointer and increment the read index. | ||||
|     This function checks for an overflow and corrects read pointer if required. | ||||
|     The dest address will not be incremented which is useful for writing to registers. | ||||
|  | ||||
|     @param[in]  f | ||||
|                 Pointer to the FIFO buffer to manipulate | ||||
|     @param[in]  buffer | ||||
|                 The pointer to data location | ||||
|     @param[in]  n | ||||
|                 Number of element that buffer can afford | ||||
|  | ||||
|     @returns number of items read from the FIFO | ||||
|  */ | ||||
| /******************************************************************************/ | ||||
| uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint16_t n) | ||||
| { | ||||
|   return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_CST_FULL_WORDS); | ||||
| } | ||||
| #endif | ||||
|  | ||||
| /******************************************************************************/ | ||||
| /*! | ||||
| @@ -839,6 +864,7 @@ uint16_t tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n) | ||||
|   return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_INC); | ||||
| } | ||||
|  | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
| /******************************************************************************/ | ||||
| /*! | ||||
|     @brief This function will write n elements into the array index specified by | ||||
| @@ -858,6 +884,7 @@ uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t* f, const void * data, | ||||
| { | ||||
|   return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_CST_FULL_WORDS); | ||||
| } | ||||
| #endif | ||||
|  | ||||
| /******************************************************************************/ | ||||
| /*! | ||||
|   | ||||
| @@ -145,22 +145,26 @@ bool tu_fifo_clear(tu_fifo_t *f); | ||||
| bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable); | ||||
|  | ||||
| #if OSAL_MUTEX_REQUIRED | ||||
|   TU_ATTR_ALWAYS_INLINE static inline | ||||
|   void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) { | ||||
|     f->mutex_wr = wr_mutex; | ||||
|     f->mutex_rd = rd_mutex; | ||||
|   } | ||||
| TU_ATTR_ALWAYS_INLINE static inline | ||||
| void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_mutex) { | ||||
|   f->mutex_wr = wr_mutex; | ||||
|   f->mutex_rd = rd_mutex; | ||||
| } | ||||
| #else | ||||
|   #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) | ||||
| #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) | ||||
| #endif | ||||
|  | ||||
| bool     tu_fifo_write                  (tu_fifo_t* f, void const * p_data); | ||||
| uint16_t tu_fifo_write_n                (tu_fifo_t* f, void const * p_data, uint16_t n); | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
| uint16_t tu_fifo_write_n_const_addr_full_words    (tu_fifo_t* f, const void * data, uint16_t n); | ||||
| #endif | ||||
|  | ||||
| bool     tu_fifo_read                   (tu_fifo_t* f, void * p_buffer); | ||||
| uint16_t tu_fifo_read_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n); | ||||
| #ifdef TUP_MEM_CONST_ADDR | ||||
| uint16_t tu_fifo_read_n_const_addr_full_words     (tu_fifo_t* f, void * buffer, uint16_t n); | ||||
| #endif | ||||
|  | ||||
| bool     tu_fifo_peek                   (tu_fifo_t* f, void * p_buffer); | ||||
| uint16_t tu_fifo_peek_n                 (tu_fifo_t* f, void * p_buffer, uint16_t n); | ||||
|   | ||||
| @@ -430,7 +430,7 @@ | ||||
| #endif | ||||
|  | ||||
| #if !defined(TUP_DCD_ENDPOINT_MAX) && defined(CFG_TUD_ENABLED) && CFG_TUD_ENABLED | ||||
| #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" | ||||
|   #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" | ||||
|   #define TUP_DCD_ENDPOINT_MAX    8 | ||||
| #endif | ||||
|  | ||||
| @@ -448,4 +448,8 @@ | ||||
|   #define TUP_DCD_EDPT_ISO_ALLOC | ||||
| #endif | ||||
|  | ||||
| #if defined(TUP_USBIP_DWC2) | ||||
|   #define TUP_MEM_CONST_ADDR | ||||
| #endif | ||||
|  | ||||
| #endif | ||||
|   | ||||
| @@ -78,8 +78,7 @@ | ||||
| // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7, M33. M55 | ||||
| #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \ | ||||
|     defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) | ||||
|   #define TU_BREAKPOINT() do                                                                                \ | ||||
|   {                                                                                                         \ | ||||
|   #define TU_BREAKPOINT() do {                                                                              \ | ||||
|     volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ | ||||
|     if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */            \ | ||||
|   } while(0) | ||||
|   | ||||
| @@ -221,8 +221,8 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb | ||||
|   5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_HEADER, U16_TO_U8S_LE(0x0120),\ | ||||
|   /* CDC Call */\ | ||||
|   5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_CALL_MANAGEMENT, 0, (uint8_t)((_itfnum) + 1),\ | ||||
|   /* CDC ACM: support line request */\ | ||||
|   4, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT, 2,\ | ||||
|   /* CDC ACM: support line request + send break */\ | ||||
|   4, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT, 6,\ | ||||
|   /* CDC Union */\ | ||||
|   5, TUSB_DESC_CS_INTERFACE, CDC_FUNC_DESC_UNION, _itfnum, (uint8_t)((_itfnum) + 1),\ | ||||
|   /* Endpoint Notification */\ | ||||
|   | ||||
| @@ -283,7 +283,18 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) | ||||
|   /* Response with status first before changing device address */ | ||||
|   dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); | ||||
| } | ||||
|  | ||||
| #ifdef __GNUC__ // caused by extra declaration of SystemCoreClock in freeRTOSConfig.h | ||||
| #pragma GCC diagnostic push | ||||
| #pragma GCC diagnostic ignored "-Wredundant-decls" | ||||
| #endif | ||||
|  | ||||
| extern u32 SystemCoreClock; | ||||
|  | ||||
| #ifdef __GNUC__ | ||||
| #pragma GCC diagnostic pop | ||||
| #endif | ||||
|  | ||||
| void dcd_remote_wakeup(uint8_t rhport) | ||||
| { | ||||
|   (void) rhport; | ||||
|   | ||||
| @@ -42,7 +42,18 @@ | ||||
|  | ||||
| #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) | ||||
|   // LPCOpen | ||||
|   #ifdef __GNUC__ | ||||
|   #pragma GCC diagnostic push | ||||
|   #pragma GCC diagnostic ignored "-Wunused-parameter" | ||||
|   #pragma GCC diagnostic ignored "-Wstrict-prototypes" | ||||
|   #endif | ||||
|  | ||||
|   #include "chip.h" | ||||
|  | ||||
|   #ifdef __GNUC__ | ||||
|   #pragma GCC diagnostic pop | ||||
|   #endif | ||||
|  | ||||
| #else | ||||
|   // SDK | ||||
|   #include "fsl_device_registers.h" | ||||
|   | ||||
| @@ -35,7 +35,9 @@ | ||||
| #include <f1c100s-irq.h> | ||||
| #include <device/dcd.h> | ||||
| #include "musb_def.h" | ||||
| #include "bsp/board.h" | ||||
|  | ||||
| //#include "bsp/board_api.h" | ||||
| extern uint32_t board_millis(void); // TODO remove | ||||
|  | ||||
| typedef uint32_t u32; | ||||
| typedef uint16_t u16; | ||||
| @@ -58,7 +60,7 @@ typedef struct TU_ATTR_PACKED | ||||
|  | ||||
| typedef struct | ||||
| { | ||||
|   tusb_control_request_t setup_packet; | ||||
|   CFG_TUD_MEM_ALIGN tusb_control_request_t setup_packet; | ||||
|   uint16_t     remaining_ctrl; /* The number of bytes remaining in data stage of control transfer. */ | ||||
|   int8_t       status_out; | ||||
|   pipe_state_t pipe0; | ||||
| @@ -350,7 +352,7 @@ static void USBC_INT_DisableRxEp(u8 ep_index) | ||||
|  * INTERNAL FUNCTION DECLARATION | ||||
|  *------------------------------------------------------------------*/ | ||||
|  | ||||
| static dcd_data_t _dcd; | ||||
| CFG_TUD_MEM_ALIGN static dcd_data_t _dcd; | ||||
|  | ||||
| static inline free_block_t *find_containing_block(free_block_t *beg, free_block_t *end, uint_fast16_t addr) | ||||
| { | ||||
| @@ -560,7 +562,7 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne | ||||
|  | ||||
| static void process_setup_packet(uint8_t rhport) | ||||
| { | ||||
|   uint32_t *p = (uint32_t*)&_dcd.setup_packet; | ||||
|   uint32_t *p = (uint32_t*)(uintptr_t) &_dcd.setup_packet; | ||||
|   p[0]        = USBC_Readl(USBC_REG_EPFIFO0(USBC0_BASE)); | ||||
|   p[1]        = USBC_Readl(USBC_REG_EPFIFO0(USBC0_BASE)); | ||||
|  | ||||
| @@ -594,7 +596,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr) | ||||
|   if (len) { | ||||
|     volatile void* addr = (volatile void*)(USBC_REG_EPFIFO1(USBC0_BASE) + (epnum_minus1 << 2)); | ||||
|     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) { | ||||
|       pipe_read_write_packet_ff((tu_fifo_t *)buf, addr, len, TUSB_DIR_IN); | ||||
|       pipe_read_write_packet_ff((tu_fifo_t *)(uintptr_t) buf, addr, len, TUSB_DIR_IN); | ||||
|     } else { | ||||
|       pipe_write_packet(buf, addr, len); | ||||
|       pipe->buf       = buf + len; | ||||
| @@ -622,7 +624,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr) | ||||
|   if (len) { | ||||
|     volatile void* addr = (volatile void*)(USBC_REG_EPFIFO1(USBC0_BASE) + (epnum_minus1 << 2)); | ||||
|     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_OUT] & TU_BIT(epnum_minus1)) { | ||||
|       pipe_read_write_packet_ff((tu_fifo_t *)buf, addr, len, TUSB_DIR_OUT); | ||||
|       pipe_read_write_packet_ff((tu_fifo_t *)(uintptr_t )buf, addr, len, TUSB_DIR_OUT); | ||||
|     } else { | ||||
|       pipe_read_packet(buf, addr, len); | ||||
|       pipe->buf       = buf + len; | ||||
|   | ||||
| @@ -55,7 +55,8 @@ | ||||
| #define OPT_MCU_LPC18XX             6 ///< NXP LPC18xx | ||||
| #define OPT_MCU_LPC40XX             7 ///< NXP LPC40xx | ||||
| #define OPT_MCU_LPC43XX             8 ///< NXP LPC43xx | ||||
| #define OPT_MCU_LPC51UXX            9 ///< NXP LPC51U6x | ||||
| #define OPT_MCU_LPC51               9 ///< NXP LPC51 | ||||
| #define OPT_MCU_LPC51UXX            OPT_MCU_LPC51 ///< NXP LPC51 | ||||
| #define OPT_MCU_LPC54              10 ///< NXP LPC54 | ||||
| #define OPT_MCU_LPC55              11 ///< NXP LPC55 | ||||
| // legacy naming | ||||
|   | ||||
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