fix linker h745 issue with clang
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@@ -142,7 +142,7 @@
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#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */
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#define USE_RTOS 0U
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#define PREFETCH_ENABLE 1U
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#define ART_ACCLERATOR_ENABLE 1U /* To enable instruction cache and prefetch */
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#define ART_ACCELERATOR_ENABLE 1U /* To enable instruction cache and prefetch */
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#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
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#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
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@@ -1,42 +1,26 @@
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/**
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******************************************************************************
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* @file stm32h7xx_hal_conf_template.h
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* @author MCD Application Team
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* @brief HAL configuration template file.
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* This file should be copied to the application folder and renamed
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* to stm32h7xx_hal_conf.h.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
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* Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32H7xx_HAL_CONF_H
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#define __STM32H7xx_HAL_CONF_H
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#ifndef STM32H7xx_HAL_CONF_H
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#define STM32H7xx_HAL_CONF_H
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#ifdef __cplusplus
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extern "C" {
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@@ -161,7 +145,7 @@
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* frequency, this source is inserted directly through I2S_CKIN pad.
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*/
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#if !defined (EXTERNAL_CLOCK_VALUE)
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#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
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#define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/
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#endif /* EXTERNAL_CLOCK_VALUE */
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/* Tip: To avoid modifying this file each time you need to use different HSE,
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@@ -171,42 +155,56 @@
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/**
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* @brief This is the HAL system configuration section
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*/
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#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
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#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */
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#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
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#define TICK_INT_PRIORITY (0x0FUL) /*!< tick interrupt priority */
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#define USE_RTOS 0
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#define USE_SD_TRANSCEIVER 1U /*!< use uSD Transceiver */
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#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
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#define USE_SPI_CRC 1U /*!< use CRC in SPI */
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#define USE_FLASH_ECC 0U /*!< use ECC error management in FLASH */
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#define USE_SDIO_TRANSCEIVER 0U /*!< use SDIO Transceiver */
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#define SDIO_MAX_IO_NUMBER 7U /*!< SDIO device support maximum IO number */
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#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
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#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
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#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
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#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */
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#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
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#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
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#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
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#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
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#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
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#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
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#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */
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#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
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#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */
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#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */
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#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
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#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
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#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
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#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
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#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
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#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
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#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */
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#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
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#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
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#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
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#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
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#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
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#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
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#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
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#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
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#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
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#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
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#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */
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#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */
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#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
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#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
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#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
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#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
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#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
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#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
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#define USE_HAL_SDIO_REGISTER_CALLBACKS 0U /* SDIO register callback disabled */
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#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
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#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
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#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
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#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
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@@ -217,15 +215,15 @@
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#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
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/* ########################### Ethernet Configuration ######################### */
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#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */
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#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */
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#define ETH_TX_DESC_CNT 4U /* number of Ethernet Tx DMA descriptors */
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#define ETH_RX_DESC_CNT 4U /* number of Ethernet Rx DMA descriptors */
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#define ETH_MAC_ADDR0 ((uint8_t)0x02)
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#define ETH_MAC_ADDR1 ((uint8_t)0x00)
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#define ETH_MAC_ADDR2 ((uint8_t)0x00)
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#define ETH_MAC_ADDR3 ((uint8_t)0x00)
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#define ETH_MAC_ADDR4 ((uint8_t)0x00)
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#define ETH_MAC_ADDR5 ((uint8_t)0x00)
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#define ETH_MAC_ADDR0 (0x02UL)
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#define ETH_MAC_ADDR1 (0x00UL)
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#define ETH_MAC_ADDR2 (0x00UL)
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#define ETH_MAC_ADDR3 (0x00UL)
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#define ETH_MAC_ADDR4 (0x00UL)
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#define ETH_MAC_ADDR5 (0x00UL)
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/* ########################## Assert Selection ############################## */
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/**
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@@ -477,7 +475,4 @@
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}
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#endif
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#endif /* __STM32H7xx_HAL_CONF_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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#endif /* STM32H7xx_HAL_CONF_H */
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