dma host work well with bulk/control
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@@ -861,6 +861,8 @@ bool handle_channel_in_dma(dwc2_regs_t* dwc2, uint8_t ch_id, bool is_period, uin
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if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL | HCINT_BABBLE_ERR)) {
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if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL | HCINT_BABBLE_ERR)) {
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is_done = true;
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is_done = true;
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xfer->err_count = 0;
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xfer->err_count = 0;
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const uint16_t remain_bytes = (uint16_t) channel->hctsiz_bm.xfer_size;
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xfer->xferred_bytes += (xfer->buf_len - remain_bytes);
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if (hcint & HCINT_STALL) {
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if (hcint & HCINT_STALL) {
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xfer->result = XFER_RESULT_STALLED;
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xfer->result = XFER_RESULT_STALLED;
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} else if (hcint & HCINT_BABBLE_ERR) {
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} else if (hcint & HCINT_BABBLE_ERR) {
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@@ -897,8 +899,19 @@ bool handle_channel_out_dma(dwc2_regs_t* dwc2, uint8_t ch_id, bool is_period, ui
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if (hcint & HCINT_HALTED) {
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if (hcint & HCINT_HALTED) {
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if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL)) {
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if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL)) {
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is_done = true;
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is_done = true;
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xfer->result = (hcint & HCINT_STALL) ? XFER_RESULT_STALLED : XFER_RESULT_SUCCESS;
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xfer->err_count = 0;
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xfer->err_count = 0;
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if (hcint & HCINT_XFER_COMPLETE) {
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xfer->result = XFER_RESULT_SUCCESS;
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xfer->xferred_bytes += xfer->buf_len;
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} else {
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xfer->result = XFER_RESULT_STALLED;
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const uint16_t remain_packets = channel->hctsiz_bm.packet_count;
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const uint16_t total_packets = cal_packet_count(xfer->buf_len, channel->hcchar_bm.ep_size);
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const uint16_t actual_bytes = (total_packets - remain_packets) * channel->hcchar_bm.ep_size;
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xfer->xferred_bytes += actual_bytes;
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xfer->buf_start += actual_bytes;
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xfer->buf_len -= actual_bytes;
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}
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channel->hcintmsk &= ~HCINT_ACK;
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channel->hcintmsk &= ~HCINT_ACK;
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} else if (hcint & HCINT_XACT_ERR) {
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} else if (hcint & HCINT_XACT_ERR) {
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if (hcint & (HCINT_NAK | HCINT_NYET | HCINT_ACK)) {
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if (hcint & (HCINT_NAK | HCINT_NYET | HCINT_ACK)) {
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