have p4 dma somewhat working but having issue with buffer that does not occupy the whole cache line

This commit is contained in:
hathach
2024-11-20 18:03:42 +07:00
parent 43a45f29cd
commit 4da5de707b
6 changed files with 104 additions and 18 deletions

View File

@@ -229,6 +229,8 @@ bool dwc2_core_init(uint8_t rhport, bool is_highspeed, bool is_dma) {
dwc2->gotgint = 0xFFFFFFFFU;
dwc2->gintmsk = 0;
TU_LOG(DWC2_COMMON_DEBUG, "DMA = %u\r\n", is_dma);
if (is_dma) {
// DMA seems to be only settable after a core reset, and not possible to switch on-the-fly
dwc2->gahbcfg |= GAHBCFG_DMAEN | GAHBCFG_HBSTLEN_2;