refractor for device able to work on usb1 of lpc43xx. But could not get it work on EA4357
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@@ -61,7 +61,7 @@
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// HAL API
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//--------------------------------------------------------------------+
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// callback from tusb.h
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extern void tusb_isr(uint8_t controller_id);
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extern void tusb_isr(uint8_t coreid);
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/** \brief Initialize USB controller hardware
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* \returns \ref tusb_error_t type to indicate success or error condition.
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@@ -70,18 +70,18 @@ extern void tusb_isr(uint8_t controller_id);
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tusb_error_t hal_init(void);
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/** \brief Enable USB Interrupt on a specific USB Controller
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* \param[in] controller_id is a zero-based index to identify USB controller's ID
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* \param[in] coreid is a zero-based index to identify USB controller's ID
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* \note Some MCUs such as NXP LPC43xx has multiple USB controllers. It is necessary to know which USB controller for
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* those MCUs.
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*/
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static inline void hal_interrupt_enable(uint8_t controller_id) ATTR_ALWAYS_INLINE;
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static inline void hal_interrupt_enable(uint8_t coreid) ATTR_ALWAYS_INLINE;
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/** \brief Disable USB Interrupt on a specific USB Controller
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* \param[in] controller_id is a zero-based index to identify USB controller's ID
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* \param[in] coreid is a zero-based index to identify USB controller's ID
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* \note Some MCUs such as NXP LPC43xx has multiple USB controllers. It is necessary to know which USB controller for
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* those MCUs.
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*/
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static inline void hal_interrupt_disable(uint8_t controller_id) ATTR_ALWAYS_INLINE;
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static inline void hal_interrupt_disable(uint8_t coreid) ATTR_ALWAYS_INLINE;
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//--------------------------------------------------------------------+
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// INCLUDE DRIVEN
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@@ -54,14 +54,10 @@
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#include "LPC11Uxx.h"
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#define NXP_ROMDRIVER_REG_BASE LPC_USB_BASE
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#define NXP_ROMDRIVER_FUNCTION_ADDR 0x1FFF1FF8
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#ifdef __cplusplus
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extern "C" {
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#endif
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static inline void hal_interrupt_enable(uint8_t controller_id)
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{
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(void) controller_id; // discard compiler's warning
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@@ -54,9 +54,6 @@
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#include "LPC13Uxx.h"
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#define NXP_ROMDRIVER_REG_BASE LPC_USB_BASE
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#define NXP_ROMDRIVER_FUNCTION_ADDR 0x1FFF1FF8
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -81,7 +81,8 @@ tusb_error_t hal_init(void)
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LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
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// reset controller & set role
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hal_controller_reset(0);
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ASSERT_STATUS( hal_controller_reset(0) );
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#if TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_HOST
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LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
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#else // TODO OTG
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@@ -106,7 +107,7 @@ tusb_error_t hal_init(void)
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//LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
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LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
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hal_controller_reset(1);
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ASSERT_STATUS( hal_controller_reset(1) );
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#if TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST
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LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
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@@ -116,7 +117,6 @@ tusb_error_t hal_init(void)
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#endif
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LPC_USB1->PORTSC1_D |= (1<<24); // TODO abtract, force port to fullspeed
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hal_interrupt_enable(1);
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#endif
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@@ -54,22 +54,18 @@
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#include "LPC43xx.h"
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#define NXP_ROMDRIVER_REG_BASE LPC_USB0_BASE // TODO USB1
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#define NXP_ROMDRIVER_FUNCTION_ADDR 0x1040011C
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#ifdef __cplusplus
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extern "C" {
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#endif
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static inline void hal_interrupt_enable(uint8_t controller_id)
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static inline void hal_interrupt_enable(uint8_t coreid)
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{
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NVIC_EnableIRQ(controller_id ? USB1_IRQn : USB0_IRQn);
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NVIC_EnableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
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}
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static inline void hal_interrupt_disable(uint8_t controller_id)
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static inline void hal_interrupt_disable(uint8_t coreid)
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{
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NVIC_DisableIRQ(controller_id ? USB1_IRQn : USB0_IRQn);
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NVIC_DisableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
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}
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#ifdef __cplusplus
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