refractor for device able to work on usb1 of lpc43xx. But could not get it work on EA4357

This commit is contained in:
hathach
2013-11-06 14:20:45 +07:00
parent b2b53e61fb
commit 58b41a05db
7 changed files with 148 additions and 137 deletions

View File

@@ -61,7 +61,7 @@
// HAL API
//--------------------------------------------------------------------+
// callback from tusb.h
extern void tusb_isr(uint8_t controller_id);
extern void tusb_isr(uint8_t coreid);
/** \brief Initialize USB controller hardware
* \returns \ref tusb_error_t type to indicate success or error condition.
@@ -70,18 +70,18 @@ extern void tusb_isr(uint8_t controller_id);
tusb_error_t hal_init(void);
/** \brief Enable USB Interrupt on a specific USB Controller
* \param[in] controller_id is a zero-based index to identify USB controller's ID
* \param[in] coreid is a zero-based index to identify USB controller's ID
* \note Some MCUs such as NXP LPC43xx has multiple USB controllers. It is necessary to know which USB controller for
* those MCUs.
*/
static inline void hal_interrupt_enable(uint8_t controller_id) ATTR_ALWAYS_INLINE;
static inline void hal_interrupt_enable(uint8_t coreid) ATTR_ALWAYS_INLINE;
/** \brief Disable USB Interrupt on a specific USB Controller
* \param[in] controller_id is a zero-based index to identify USB controller's ID
* \param[in] coreid is a zero-based index to identify USB controller's ID
* \note Some MCUs such as NXP LPC43xx has multiple USB controllers. It is necessary to know which USB controller for
* those MCUs.
*/
static inline void hal_interrupt_disable(uint8_t controller_id) ATTR_ALWAYS_INLINE;
static inline void hal_interrupt_disable(uint8_t coreid) ATTR_ALWAYS_INLINE;
//--------------------------------------------------------------------+
// INCLUDE DRIVEN

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@@ -54,14 +54,10 @@
#include "LPC11Uxx.h"
#define NXP_ROMDRIVER_REG_BASE LPC_USB_BASE
#define NXP_ROMDRIVER_FUNCTION_ADDR 0x1FFF1FF8
#ifdef __cplusplus
extern "C" {
#endif
static inline void hal_interrupt_enable(uint8_t controller_id)
{
(void) controller_id; // discard compiler's warning

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@@ -54,9 +54,6 @@
#include "LPC13Uxx.h"
#define NXP_ROMDRIVER_REG_BASE LPC_USB_BASE
#define NXP_ROMDRIVER_FUNCTION_ADDR 0x1FFF1FF8
#ifdef __cplusplus
extern "C" {
#endif

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@@ -81,7 +81,8 @@ tusb_error_t hal_init(void)
LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
// reset controller & set role
hal_controller_reset(0);
ASSERT_STATUS( hal_controller_reset(0) );
#if TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_HOST
LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
@@ -106,7 +107,7 @@ tusb_error_t hal_init(void)
//LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
hal_controller_reset(1);
ASSERT_STATUS( hal_controller_reset(1) );
#if TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST
LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
@@ -116,7 +117,6 @@ tusb_error_t hal_init(void)
#endif
LPC_USB1->PORTSC1_D |= (1<<24); // TODO abtract, force port to fullspeed
hal_interrupt_enable(1);
#endif

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@@ -54,22 +54,18 @@
#include "LPC43xx.h"
#define NXP_ROMDRIVER_REG_BASE LPC_USB0_BASE // TODO USB1
#define NXP_ROMDRIVER_FUNCTION_ADDR 0x1040011C
#ifdef __cplusplus
extern "C" {
#endif
static inline void hal_interrupt_enable(uint8_t controller_id)
static inline void hal_interrupt_enable(uint8_t coreid)
{
NVIC_EnableIRQ(controller_id ? USB1_IRQn : USB0_IRQn);
NVIC_EnableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
}
static inline void hal_interrupt_disable(uint8_t controller_id)
static inline void hal_interrupt_disable(uint8_t coreid)
{
NVIC_DisableIRQ(controller_id ? USB1_IRQn : USB0_IRQn);
NVIC_DisableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
}
#ifdef __cplusplus