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improving dwc2, merging diep and doep if possible

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hathach
2024-10-04 22:26:40 +07:00
parent b2a98eadab
commit 599bb0c822
7 changed files with 257 additions and 180 deletions
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6
src/portable/synopsys/dwc2/dwc2_info.py
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@@ -50,7 +50,7 @@ class GHWCFG2(ctypes.LittleEndianStructure):
("num_host_ch", ctypes.c_uint32, 4),
("period_channel_support", ctypes.c_uint32, 1),
("enable_dynamic_fifo", ctypes.c_uint32, 1),
("mul_cpu_int", ctypes.c_uint32, 1),
("mul_proc_intrpt", ctypes.c_uint32, 1),
("reserved21", ctypes.c_uint32, 1),
("nptx_q_depth", ctypes.c_uint32, 2),
("ptx_q_depth", ctypes.c_uint32, 2),
@@ -119,13 +119,13 @@ GHWCFG2_field = {
2: "DMA internal"
},
'hs_phy_type': {
0: "N/A",
0: "n/a",
1: "UTMI+",
2: "ULPI",
3: "UTMI+/ULPI"
},
'fs_phy_type': {
0: "N/A",
0: "n/a",
1: "Dedicated",
2: "Shared UTMI+",
3: "Shared ULPI"