diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index c6132a1f5..bcd584953 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -534,6 +534,9 @@ void dcd_init (uint8_t rhport)
   int_mask = dwc2->gotgint;
   dwc2->gotgint |= int_mask;
 
+  // Configure TX FIFO to set the TX FIFO empty interrupt when half-empty
+  dwc2->gahbcfg &= ~GAHBCFG_TXFELVL;
+
   // Required as part of core initialization.
   // TODO: How should mode mismatch be handled? It will cause
   // the core to stop working/require reset.
@@ -645,7 +648,10 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
   xfer->max_size = tu_edpt_packet_size(desc_edpt);
   xfer->interval = desc_edpt->bInterval;
 
-  uint16_t const fifo_size = tu_div_ceil(xfer->max_size, 4);
+  // The fifo-empty interrupt fires when the interrupt is half empty. In order
+  // to be able to write a packet at that point, the fifo must be twice the
+  // max_size.
+  uint16_t const fifo_size = tu_div_ceil(xfer->max_size * 2, 4);
 
   if(dir == TUSB_DIR_OUT)
   {