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update at32f405 dwc2 info and phy width selection

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This commit is contained in:
hathach
2025-08-07 14:20:40 +07:00
parent f6bec1073e
commit 5b9908a39b
3 changed files with 72 additions and 70 deletions
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24
src/portable/synopsys/dwc2/dwc2_common.c
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@@ -92,6 +92,14 @@ static void phy_hs_init(dwc2_regs_t* dwc2) {
const dwc2_ghwcfg2_t ghwcfg2 = {.value = dwc2->ghwcfg2};
const dwc2_ghwcfg4_t ghwcfg4 = {.value = dwc2->ghwcfg4};
uint8_t phy_width;
if (CFG_TUSB_MCU != OPT_MCU_AT32F402_405 && // at32f402_405 does not support 16-bit
ghwcfg4.phy_data_width) {
phy_width = 16; // 16-bit PHY interface if supported
} else {
phy_width = 8; // 8-bit PHY interface
}
// De-select FS PHY
gusbcfg &= ~GUSBCFG_PHYSEL;
@@ -119,12 +127,10 @@ static void phy_hs_init(dwc2_regs_t* dwc2) {
gusbcfg &= ~GUSBCFG_ULPI_UTMI_SEL;
// Set 16-bit interface if supported
if (ghwcfg4.phy_data_width) {
#if CFG_TUSB_MCU != OPT_MCU_AT32F402_405 // at32f402_405 does not actually support 16-bit
gusbcfg |= GUSBCFG_PHYIF16; // 16 bit
#endif
if (phy_width == 16) {
gusbcfg |= GUSBCFG_PHYIF16;
} else {
gusbcfg &= ~GUSBCFG_PHYIF16; // 8 bit
gusbcfg &= ~GUSBCFG_PHYIF16;
}
}
@@ -141,13 +147,7 @@ static void phy_hs_init(dwc2_regs_t* dwc2) {
// - 9 if using 8-bit PHY interface
// - 5 if using 16-bit PHY interface
gusbcfg &= ~GUSBCFG_TRDT_Msk;
#if CFG_TUSB_MCU == OPT_MCU_AT32F402_405 // at32f402_405 does not actually support 16-bit
gusbcfg |= 9u << GUSBCFG_TRDT_Pos;
#else
gusbcfg |= (dwc2->ghwcfg4_bm.phy_data_width ? 5u : 9u) << GUSBCFG_TRDT_Pos;
#endif
gusbcfg |= (phy_width == 16 ? 5u : 9u) << GUSBCFG_TRDT_Pos;
dwc2->gusbcfg = gusbcfg;
// MCU specific PHY update post reset