get passed set address
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		@@ -119,6 +119,9 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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{
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  (void) rhport;
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  (void) dev_addr;
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  // SAMG can only set address after status for this request is complete
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  // do it at dcd_edpt0_status_complete()
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}
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// Receive Set Configure request
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@@ -138,6 +141,27 @@ void dcd_remote_wakeup (uint8_t rhport)
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// Endpoint API
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//--------------------------------------------------------------------+
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// Invoked when a control transfer's status stage is complete.
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// May help DCD to prepare for next control transfer, this API is optional.
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void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
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{
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  (void) rhport;
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  if (request->bRequest == TUSB_REQ_SET_ADDRESS)
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  {
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    uint8_t const dev_addr = (uint8_t) request->wValue;
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    TU_LOG2("dev address = %d", dev_addr);
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    // Enable addressed state
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    UDP->UDP_GLB_STAT |= UDP_GLB_STAT_FADDEN_Msk;
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    // Set new address & Function enable bit
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    UDP->UDP_FADDR |= UDP_FADDR_FADD(dev_addr);
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    UDP->UDP_FADDR |= UDP_FADDR_FEN_Msk;
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  }
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}
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// Configure endpoint's registers according to descriptor
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bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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{
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@@ -162,19 +186,14 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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  // control endpoint
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  if ( epnum == 0 )
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  {
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    // opposite to DIR bit --> status phase
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    // switch the DIR bit
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//    if ( dir != tu_bit_test(UDP->UDP_CSR[0], UDP_CSR_DIR_Pos) )
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//    {
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//
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//    }
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    if (dir == TUSB_DIR_OUT)
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    {
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      // Clear DIR bit
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      UDP->UDP_CSR[0] &= ~UDP_CSR_DIR_Msk;
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      //
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    }else
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    {
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      // Set DIR bit if needed
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      UDP->UDP_CSR[0] |= UDP_CSR_DIR_Msk;
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      // Write data to fifo
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@@ -250,13 +269,6 @@ void dcd_isr(uint8_t rhport)
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        setup[i] = (uint8_t) UDP->UDP_FDR[0];
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      }
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      // Set EP0 Dir bit & Clear setup bit
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//      uint32_t csr = UDP->UDP_CSR[0];
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//      csr &= ~(UDP_CSR_RXSETUP_Msk | UDP_CSR_DIR_Msk);
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//      if ( setup[0] & TUSB_DIR_IN_MASK ) csr |= UDP_CSR_DIR_Msk;
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//
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//      UDP->UDP_CSR[0] = csr;
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      // notify usbd
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      dcd_event_setup_received(rhport, setup, true);
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@@ -283,7 +295,12 @@ void dcd_isr(uint8_t rhport)
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    // Endpoint OUT
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    if (UDP->UDP_CSR[epnum] & UDP_CSR_RX_DATA_BK0_Msk)
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    {
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      dcd_event_bus_signal(rhport, DCD_EVENT_INVALID, true);
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      uint16_t const xact_len = (uint16_t) ((UDP->UDP_CSR[0] & UDP_CSR_RXBYTECNT_Msk) >> UDP_CSR_RXBYTECNT_Pos);
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      dcd_event_xfer_complete(rhport, epnum, xact_len, XFER_RESULT_SUCCESS, true);
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      // Clear DATA Bank0 bit
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      UDP->UDP_CSR[0] &= ~UDP_CSR_RX_DATA_BK0_Msk;
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    }
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  }
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}
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