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able to detect as hs

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This commit is contained in:
hathach
2020-05-31 19:41:22 +07:00
parent d4bf777c94
commit 5ffba8536d
3 changed files with 18 additions and 9 deletions
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13
hw/bsp/stm32h743eval/stm32h743eval.c
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@@ -265,6 +265,7 @@ void board_init(void)
#endif #endif
#if BOARD_DEVICE_RHPORT_NUM == 1 #if BOARD_DEVICE_RHPORT_NUM == 1
// Despite being call USB2_OTG // Despite being call USB2_OTG
// OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port // OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
__GPIOA_CLK_ENABLE(); __GPIOA_CLK_ENABLE();
@@ -316,6 +317,8 @@ void board_init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = GPIO_AF10_OTG2_HS; GPIO_InitStruct.Alternate = GPIO_AF10_OTG2_HS;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
// Enable ULPI clock
__HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE(); __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE();
/* Enable USB HS Clocks */ /* Enable USB HS Clocks */
@@ -325,12 +328,14 @@ void board_init(void)
USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
// Force device mode // Force device mode
// USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD; USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD;
// USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
// B-peripheral session valid override enabl // B-peripheral session valid override enabl
// USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
// USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
HAL_PWREx_EnableUSBVoltageDetector();
#endif // rhport = 1 #endif // rhport = 1
} }

4
src/common/tusb_common.h
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@@ -241,9 +241,9 @@ void tu_print_var(uint8_t const* buf, uint32_t bufsize)
#define TU_LOG2 TU_LOG1 #define TU_LOG2 TU_LOG1
#define TU_LOG2_MEM TU_LOG1_MEM #define TU_LOG2_MEM TU_LOG1_MEM
#define TU_LOG2_VAR TU_LOG1_VAR #define TU_LOG2_VAR TU_LOG1_VAR
#define TU_LOG2_LOCATION() TU_LOG1_LOCATION()
#define TU_LOG2_INT TU_LOG1_INT #define TU_LOG2_INT TU_LOG1_INT
#define TU_LOG2_HEX TU_LOG1_HEX #define TU_LOG2_HEX TU_LOG1_HEX
#define TU_LOG2_LOCATION() TU_LOG1_LOCATION()
#endif #endif
@@ -277,6 +277,7 @@ static inline char const* lookup_find(lookup_table_t const* p_table, uint32_t ke
#define TU_LOG1_VAR(...) #define TU_LOG1_VAR(...)
#define TU_LOG1_INT(...) #define TU_LOG1_INT(...)
#define TU_LOG1_HEX(...) #define TU_LOG1_HEX(...)
#define TU_LOG1_LOCATION()
#endif #endif
#ifndef TU_LOG2 #ifndef TU_LOG2
@@ -285,6 +286,7 @@ static inline char const* lookup_find(lookup_table_t const* p_table, uint32_t ke
#define TU_LOG2_VAR(...) #define TU_LOG2_VAR(...)
#define TU_LOG2_INT(...) #define TU_LOG2_INT(...)
#define TU_LOG2_HEX(...) #define TU_LOG2_HEX(...)
#define TU_LOG2_LOCATION()
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus

10
src/portable/st/synopsys/dcd_synopsys.c
View File

@@ -197,6 +197,8 @@ static void end_of_reset(uint8_t rhport)
// However, keep for debugging and in case Low Speed is ever supported. // However, keep for debugging and in case Low Speed is ever supported.
uint32_t enum_spd = (dev->DSTS & USB_OTG_DSTS_ENUMSPD_Msk) >> USB_OTG_DSTS_ENUMSPD_Pos; uint32_t enum_spd = (dev->DSTS & USB_OTG_DSTS_ENUMSPD_Msk) >> USB_OTG_DSTS_ENUMSPD_Pos;
// TODO set turnaround in GUSBCFG accordingly to the speed
// Maximum packet size for EP 0 is set for both directions by writing // Maximum packet size for EP 0 is set for both directions by writing
// DIEPCTL. // DIEPCTL.
if(enum_spd == 0x03) { if(enum_spd == 0x03) {
@@ -239,7 +241,8 @@ void dcd_init (uint8_t rhport)
// Turn around time for Highspeed is 0x09 // Turn around time for Highspeed is 0x09
usb_otg->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; usb_otg->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT;
usb_otg->GUSBCFG |= (0x09 << USB_OTG_GUSBCFG_TRDT_Pos); usb_otg->GUSBCFG |= (0x09 << USB_OTG_GUSBCFG_TRDT_Pos);
}else }
else
#endif #endif
{ {
// Turn around programmed for 32+ MHz is 0x06 // Turn around programmed for 32+ MHz is 0x06
@@ -256,8 +259,6 @@ void dcd_init (uint8_t rhport)
// Force device mode // Force device mode
usb_otg->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; usb_otg->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
TU_LOG2_LOCATION();
// Restart PHY clock // Restart PHY clock
*((volatile uint32_t *)(_dcd_rhport[rhport].regs + USB_OTG_PCGCCTL_BASE)) = 0; *((volatile uint32_t *)(_dcd_rhport[rhport].regs + USB_OTG_PCGCCTL_BASE)) = 0;
@@ -282,8 +283,9 @@ void dcd_init (uint8_t rhport)
dev->DCFG &= ~(3 << USB_OTG_DCFG_DSPD_Pos); dev->DCFG &= ~(3 << USB_OTG_DCFG_DSPD_Pos);
// Transceiver delay, necessary for some ULPI PHYs // Transceiver delay, necessary for some ULPI PHYs
dev->DCFG |= (1 << 14); //dev->DCFG |= (1 << 14);
} }
else
#endif #endif
{ {
// full speed with internal phy // full speed with internal phy