fix build error with ohci
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@@ -88,8 +88,9 @@ typedef struct {
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}ohci_td_item_t;
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typedef struct ATTR_ALIGNED(16) {
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//------------- Word 0 -------------//
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typedef struct ATTR_ALIGNED(16)
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{
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// Word 0
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uint32_t used : 1;
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uint32_t index : 4; // endpoint index the td belongs to, or device address in case of control xfer
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uint32_t expected_bytes : 13; // TODO available for hcd
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@@ -100,15 +101,14 @@ typedef struct ATTR_ALIGNED(16) {
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volatile uint32_t data_toggle : 2;
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volatile uint32_t error_count : 2;
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volatile uint32_t condition_code : 4;
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/*---------- End Word 1 ----------*/
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//------------- Word 1 -------------//
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// Word 1
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volatile uint8_t* current_buffer_pointer;
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//------------- Word 2 -------------//
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// Word 2
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volatile uint32_t next_td;
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//------------- Word 3 -------------//
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// Word 3
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uint8_t* buffer_end;
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} ohci_gtd_t;
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@@ -132,11 +132,7 @@ typedef struct ATTR_ALIGNED(16) {
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//------------- Word 1 -------------//
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union {
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uint32_t address; // 4 lsb bits are free to use
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struct {
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uint32_t class_code : 4; // FIXME refractor to use interface number instead
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uint32_t : 28;
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};
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uint32_t address;
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}td_tail;
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//------------- Word 2 -------------//
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@@ -190,14 +186,12 @@ typedef struct ATTR_ALIGNED(256) {
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// control endpoints has reserved resources
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struct {
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ohci_ed_t ed;
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ohci_gtd_t gtd[3]; // setup, data, status
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ohci_gtd_t gtd;
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}control[CFG_TUSB_HOST_DEVICE_MAX+1];
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struct {
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// ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
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ohci_ed_t ed[HCD_MAX_ENDPOINT];
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ohci_gtd_t gtd[HCD_MAX_XFER];
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}device[CFG_TUSB_HOST_DEVICE_MAX];
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// ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32
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ohci_ed_t ed_pool[HCD_MAX_ENDPOINT];
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ohci_gtd_t gtd_pool[HCD_MAX_XFER];
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} ohci_data_t;
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