rename CFG_TUSB_MEM_SECTION to CFG_TUSB_MEM_SECTION
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@@ -66,19 +66,30 @@ typedef struct {
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dcd_qtd_t qtd[DCD_QTD_MAX] ATTR_ALIGNED(32);
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}dcd_data_t;
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extern ATTR_WEAK dcd_data_t dcd_data0;
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extern ATTR_WEAK dcd_data_t dcd_data1;
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#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
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CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data0;
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CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data0;
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#endif
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data1;
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CFG_TUSB_MEM_SECTION ATTR_ALIGNED(2048) static dcd_data_t dcd_data1;
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#endif
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static LPC_USB0_Type * const LPC_USB[2] = { LPC_USB0, ((LPC_USB0_Type*) LPC_USB1_BASE) };
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static dcd_data_t* const dcd_data_ptr[2] = { &dcd_data0, &dcd_data1 };
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static dcd_data_t* const dcd_data_ptr[2] =
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{
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#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
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&dcd_data0,
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#else
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NULL,
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#endif
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#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
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&dcd_data1
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#else
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NULL
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#endif
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};
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//--------------------------------------------------------------------+
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// CONTROLLER API
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@@ -104,12 +115,11 @@ static void bus_reset(uint8_t rhport)
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LPC_USB0_Type* const lpc_usb = LPC_USB[rhport];
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// The reset value for all endpoint types is the control endpoint. If one endpoint
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//direction is enabled and the paired endpoint of opposite direction is disabled, then the
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//endpoint type of the unused direction must bechanged from the control type to any other
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//type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior
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//for the data PID tracking on the active endpoint.
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lpc_usb->ENDPTCTRL1 = lpc_usb->ENDPTCTRL2 = lpc_usb->ENDPTCTRL3 =
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(TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
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// direction is enabled and the paired endpoint of opposite direction is disabled, then the
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// endpoint type of the unused direction must bechanged from the control type to any other
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// type (e.g. bulk). Leaving an unconfigured endpoint control will cause undefined behavior
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// for the data PID tracking on the active endpoint.
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lpc_usb->ENDPTCTRL1 = lpc_usb->ENDPTCTRL2 = lpc_usb->ENDPTCTRL3 = (TUSB_XFER_BULK << 2) | (TUSB_XFER_BULK << 18);
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// USB1 only has 3 non-control endpoints
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if ( rhport == 0)
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@@ -282,6 +292,12 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
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}
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}
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// TOOD implement later
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bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
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{
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return false;
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}
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void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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{
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volatile uint32_t * reg_control = get_reg_control_addr(rhport, edpt_addr2phy(ep_addr));
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@@ -375,7 +391,9 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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return true;
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}
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//------------- Device Controller Driver's Interrupt Handler -------------//
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//--------------------------------------------------------------------+
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// ISR
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//--------------------------------------------------------------------+
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void xfer_complete_isr(uint8_t rhport, uint32_t reg_complete)
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{
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for(uint8_t ep_idx = 2; ep_idx < DCD_QHD_MAX; ep_idx++)
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@@ -504,7 +522,4 @@ void hal_dcd_isr(uint8_t rhport)
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if (int_status & INT_MASK_ERROR) TU_ASSERT(false, );
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}
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//--------------------------------------------------------------------+
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// HELPER
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//--------------------------------------------------------------------+
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#endif
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