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Merge branch 'master' into h7rs

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This commit is contained in:
HiFiPhile
2025-05-15 21:40:36 +02:00
parent 9645baa42e 9548d51c7e
commit 6346fbec16
95 changed files with 2150 additions and 1945 deletions
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36
hw/bsp/BoardPresets.json
View File

@@ -12,21 +12,31 @@
"BOARD": "${presetName}"
}
},
{
"name": "default single",
"hidden": true,
"description": "Configure preset for the ${presetName} board",
"generator": "Ninja",
"binaryDir": "${sourceDir}/build/${presetName}",
"cacheVariables": {
"BOARD": "${presetName}"
}
},
{
"name": "adafruit_clue",
"inherits": "default"
},
{
"name": "adafruit_feather_esp32_v2",
"inherits": "default"
"inherits": "default single"
},
{
"name": "adafruit_feather_esp32s2",
"inherits": "default"
"inherits": "default single"
},
{
"name": "adafruit_feather_esp32s3",
"inherits": "default"
"inherits": "default single"
},
{
"name": "adafruit_magtag_29gray",
@@ -34,7 +44,7 @@
},
{
"name": "adafruit_metro_esp32s2",
"inherits": "default"
"inherits": "default single"
},
{
"name": "apard32690",
@@ -130,39 +140,39 @@
},
{
"name": "espressif_addax_1",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_c3_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_c6_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_kaluga_1",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_p4_function_ev",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_s2_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_s3_devkitc",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_s3_devkitm",
"inherits": "default"
"inherits": "default single"
},
{
"name": "espressif_saola_1",
"inherits": "default"
"inherits": "default single"
},
{
"name": "f1c100s",

2
hw/bsp/broadcom_32bit/family.mk
View File

@@ -15,7 +15,7 @@ CFLAGS += \
CROSS_COMPILE = arm-none-eabi-
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

2
hw/bsp/broadcom_64bit/family.mk
View File

@@ -14,7 +14,7 @@ CFLAGS += \
CROSS_COMPILE = aarch64-none-elf-
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

7
hw/bsp/espressif/boards/espressif_p4_function_ev/board.h
View File

@@ -41,9 +41,10 @@
#define BUTTON_PIN 35
#define BUTTON_STATE_ACTIVE 0
// For CI hardware test, to test both device and host on the same HS port with help of
#define HIL_DEVICE_HOST_MUX_PIN 47
#define HIL_DEVICE_STATE 1
// For CI hardware test, to test both device and host on the same HS port with help of TS3USB30
// https://www.adafruit.com/product/5871
#define HIL_TS3USB30_MODE_PIN 47
#define HIL_TS3USB30_MODE_DEVICE 1
#ifdef __cplusplus
}

10
hw/bsp/espressif/boards/espressif_s2_devkitc/board.h
View File

@@ -36,13 +36,19 @@
extern "C" {
#endif
// Note: On the production version (v1.2) WS2812 is connected to GPIO 18,
// however earlier revision v1.1 WS2812 is connected to GPIO 17
#define NEOPIXEL_PIN 18
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0
// SPI for USB host shield
#define MAX3421_SPI_HOST SPI2_HOST
#define MAX3421_SCK_PIN 36
#define MAX3421_MOSI_PIN 35
#define MAX3421_MISO_PIN 37
#define MAX3421_CS_PIN 15
#define MAX3421_INTR_PIN 14
#ifdef __cplusplus
}
#endif

2
hw/bsp/espressif/boards/espressif_s3_devkitc/board.h
View File

@@ -36,7 +36,7 @@
extern "C" {
#endif
#define NEOPIXEL_PIN 48
#define NEOPIXEL_PIN 38
#define BUTTON_PIN 0
#define BUTTON_STATE_ACTIVE 0

5
hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
View File

@@ -49,6 +49,11 @@
#define MAX3421_CS_PIN 15
#define MAX3421_INTR_PIN 14
// For CI hardware test, to test both device and host on the same HS port with help of TS3USB30
// https://www.adafruit.com/product/5871
#define HIL_TS3USB30_MODE_PIN 47
#define HIL_TS3USB30_MODE_DEVICE 1
#ifdef __cplusplus
}
#endif

8
hw/bsp/espressif/boards/family.c
View File

@@ -92,10 +92,10 @@ void board_init(void) {
usb_init();
#endif
#ifdef HIL_DEVICE_HOST_MUX_PIN
gpio_reset_pin(HIL_DEVICE_HOST_MUX_PIN);
gpio_set_direction(HIL_DEVICE_HOST_MUX_PIN, GPIO_MODE_OUTPUT);
gpio_set_level(HIL_DEVICE_HOST_MUX_PIN, CFG_TUD_ENABLED ? HIL_DEVICE_STATE : (1-HIL_DEVICE_STATE));
#ifdef HIL_TS3USB30_MODE_PIN
gpio_reset_pin(HIL_TS3USB30_MODE_PIN);
gpio_set_direction(HIL_TS3USB30_MODE_PIN, GPIO_MODE_OUTPUT);
gpio_set_level(HIL_TS3USB30_MODE_PIN, CFG_TUD_ENABLED ? HIL_TS3USB30_MODE_DEVICE : (1-HIL_TS3USB30_MODE_DEVICE));
#endif
#if CFG_TUH_ENABLED && CFG_TUH_MAX3421

2
hw/bsp/espressif/family.cmake
View File

@@ -34,6 +34,6 @@ endif ()
set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components")
# set SDKCONFIG for each IDF Target
set(SDKCONFIG ${CMAKE_SOURCE_DIR}/sdkconfig.${IDF_TARGET})
set(SDKCONFIG ${CMAKE_BINARY_DIR}/sdkconfig)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)

2
hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
View File

@@ -3,7 +3,7 @@ MCU = K32L2A41A
CFLAGS += -DCPU_K32L2A41VLH1A
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
# All source paths should be relative to the top level.
LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld

2
hw/bsp/lpc15/family.mk
View File

@@ -15,7 +15,7 @@ CFLAGS += \
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc15xx/lpc_chip_15xx

2
hw/bsp/lpc17/family.mk
View File

@@ -13,7 +13,7 @@ CFLAGS += \
-DRTC_EV_SUPPORT=0
# lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=cast-qual
# caused by freeRTOS port !!
CFLAGS += -Wno-error=maybe-uninitialized

2
hw/bsp/lpc18/family.mk
View File

@@ -12,7 +12,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC18XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-qual
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs

2
hw/bsp/lpc40/family.mk
View File

@@ -13,7 +13,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC40XX
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs

6
hw/bsp/lpc43/family.mk
View File

@@ -5,14 +5,14 @@ include ${TOP}/${BOARD_PATH}/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-nostdlib \
-DCORE_M4 \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX
# mcu driver cause following warnings
CFLAGS += \
CFLAGS_GCC += \
-flto \
-nostdlib \
-Wno-error=unused-parameter \
-Wno-error=cast-qual \
-Wno-error=incompatible-pointer-types \

2
hw/bsp/rp2040/boards/raspberry_pi_pico_w/board.cmake Normal file
View File

@@ -0,0 +1,2 @@
set(PICO_PLATFORM rp2040)
set(PICO_BOARD pico_w)

70
hw/bsp/rp2040/boards/raspberry_pi_pico_w/board.h Normal file
View File

@@ -0,0 +1,70 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2025 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: Pico
url: https://www.raspberrypi.com/products/raspberry-pi-pico/
*/
#ifndef TUSB_BOARD_H
#define TUSB_BOARD_H
#ifdef __cplusplus
extern "C" {
#endif
// UART and LED are already defined in pico-sdk board
//--------------------------------------------------------------------+
// PIO_USB
//--------------------------------------------------------------------+
// default to pico brain tester
#define PICO_DEFAULT_PIO_USB_DP_PIN 20
#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN 22
#define PICO_DEFAULT_PIO_USB_VBUSEN_STATE 1
//--------------------------------------------------------------------
// USB Host MAX3421E
//--------------------------------------------------------------------
#ifdef PICO_DEFAULT_SPI
#define MAX3421_SPI PICO_DEFAULT_SPI // sdk v2
#else
#define MAX3421_SPI PICO_DEFAULT_SPI_INSTANCE // sdk v1
#endif
#define MAX3421_SCK_PIN PICO_DEFAULT_SPI_SCK_PIN
#define MAX3421_MOSI_PIN PICO_DEFAULT_SPI_TX_PIN
#define MAX3421_MISO_PIN PICO_DEFAULT_SPI_RX_PIN
#define MAX3421_CS_PIN 10
#define MAX3421_INTR_PIN 9
#ifdef __cplusplus
}
#endif
#endif

7
hw/bsp/rp2040/skip_ci.txt Normal file
View File

@@ -0,0 +1,7 @@
# boards in this files are skipped when running CI with this family
adafruit_feather_rp2040_usb_host
adafruit_fruit_jam
adafruit_metro_rp2350
feather_rp2040_max3421
pico_sdk
raspberry_pi_pico_w

7
hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk
View File

@@ -1,12 +1,9 @@
CFLAGS += \
-DSTM32F207xx \
MCU_VARIANT = stm32f207xx
CFLAGS += -DSTM32F207xx
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/STM32F207ZGTx_FLASH.ld
SRC_S += \
$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s
# For flash-jlink target
JLINK_DEVICE = stm32f207zg

13
hw/bsp/stm32f2/family.mk
View File

@@ -1,5 +1,4 @@
ST_FAMILY = f2
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
@@ -14,11 +13,10 @@ CPU_CORE ?= cortex-m3
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32F2
# mcu driver cause following warnings
CFLAGS_GCC += \
-flto \
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=sign-compare
-Wno-error=sign-compare
LDFLAGS_GCC += \
-nostdlib -nostartfiles \
@@ -40,3 +38,10 @@ INC += \
$(TOP)/$(ST_CMSIS)/Include \
$(TOP)/$(ST_HAL_DRIVER)/Inc \
$(TOP)/$(BOARD_PATH)
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
# Linker
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf

4
hw/bsp/stm32f3/boards/stm32f303disco/board.mk
View File

@@ -1,12 +1,10 @@
MCU_VARIANT = stm32f303xc
CFLAGS += \
-DSTM32F303xC \
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/STM32F303VCTx_FLASH.ld
SRC_S += \
$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s
# For flash-jlink target
JLINK_DEVICE = stm32f303vc

18
hw/bsp/stm32f3/family.mk
View File

@@ -1,22 +1,17 @@
ST_FAMILY = f3
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
DEPS_SUBMODULES += \
lib/CMSIS_5 \
$(ST_CMSIS) \
$(ST_HAL_DRIVER)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-DCFG_TUSB_MCU=OPT_MCU_STM32F3
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter
CFLAGS_GCC += \
-flto \
-Wno-error=unused-parameter
LDFLAGS_GCC += \
-nostdlib -nostartfiles \
@@ -36,3 +31,10 @@ INC += \
$(TOP)/$(ST_CMSIS)/Include \
$(TOP)/$(ST_HAL_DRIVER)/Inc \
$(TOP)/$(BOARD_PATH)
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
# Linker
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf

1
hw/bsp/stm32f4/family.mk
View File

@@ -1,6 +1,5 @@
UF2_FAMILY_ID = 0x57755a57
ST_FAMILY = f4
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver

10
hw/bsp/stm32h7/boards/stm32h743eval/board.h
View File

@@ -184,7 +184,7 @@ static MFXSTM32L152_Object_t mfx_obj = { 0 };
static MFXSTM32L152_IO_Mode_t* mfx_io = NULL;
static uint32_t mfx_vbus_pin[2] = { MFXSTM32L152_GPIO_PIN_7, MFXSTM32L152_GPIO_PIN_9 };
int32_t board_i2c_init(void) {
static int32_t board_i2c_init(void) {
__HAL_RCC_I2C1_CLK_ENABLE();
__HAL_RCC_I2C1_FORCE_RESET();
__HAL_RCC_I2C1_RELEASE_RESET();
@@ -200,16 +200,16 @@ int32_t board_i2c_init(void) {
return 0;
}
int32_t board_i2c_deinit(void) {
static int32_t board_i2c_deinit(void) {
return 0;
}
int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
static int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
TU_ASSERT (HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
return 0;
}
int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
static int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
TU_ASSERT(HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
return 0;
}
@@ -249,7 +249,7 @@ static inline void board_init2(void) {
}
// VBUS1 is actually controlled by USB3320C PHY (using dwc2 drivebus signal)
void board_vbus_set(uint8_t rhport, bool state) {
static void TU_ATTR_UNUSED board_vbus_set(uint8_t rhport, bool state) {
if (mfx_io) {
mfx_io->IO_WritePin(&mfx_obj, mfx_vbus_pin[rhport], state);
}

4
hw/bsp/stm32h7/family.c
View File

@@ -80,7 +80,7 @@ void OTG_HS_IRQHandler(void) {
}
#ifdef TRACE_ETM
void trace_etm_init(void) {
static void trace_etm_init(void) {
// H7 trace pin is PE2 to PE6
GPIO_InitTypeDef gpio_init;
gpio_init.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
@@ -94,7 +94,7 @@ void trace_etm_init(void) {
DBGMCU->CR |= DBGMCU_CR_DBG_TRACECKEN | DBGMCU_CR_DBG_CKD1EN | DBGMCU_CR_DBG_CKD3EN;
}
#else
#define trace_etm_init()
#define trace_etm_init()
#endif
void board_init(void) {

4
hw/bsp/stm32h7/family.mk
View File

@@ -45,11 +45,9 @@ CFLAGS += \
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
# GCC Flags
CFLAGS_GCC += \
-flto \
# suppress warning caused by vendor mcu driver
CFLAGS_GCC += \
-flto \
-Wno-error=cast-align \
-Wno-error=unused-parameter \

3
hw/bsp/stm32l0/boards/stm32l052dap52/board.mk
View File

@@ -1,10 +1,9 @@
MCU_VARIANT = stm32l052xx
CFLAGS += \
-DSTM32L052xx
LD_FILE = $(BOARD_PATH)/STM32L052K8Ux_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l052xx.s
# For flash-jlink target
JLINK_DEVICE = stm32l052k8

4
hw/bsp/stm32l0/boards/stm32l0538disco/board.mk
View File

@@ -1,12 +1,10 @@
MCU_VARIANT = stm32l053xx
CFLAGS += \
-DSTM32L053xx
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/STM32L053C8Tx_FLASH.ld
SRC_S += \
$(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s
# For flash-jlink target
JLINK_DEVICE = STM32L053R8

19
hw/bsp/stm32l0/family.mk
View File

@@ -1,9 +1,4 @@
ST_FAMILY = l0
DEPS_SUBMODULES += \
lib/CMSIS_5 \
hw/mcu/st/cmsis_device_$(ST_FAMILY) \
hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
@@ -11,20 +6,17 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m0plus
CFLAGS += \
-flto \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_EXAMPLE_VIDEO_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_STM32L0
# mcu driver cause following warnings
CFLAGS_GCC += \
-flto \
-Wno-error=unused-parameter \
-Wno-error=redundant-decls \
-Wno-error=cast-align \
ifeq ($(TOOLCHAIN),gcc)
CFLAGS_GCC += -Wno-error=maybe-uninitialized
endif
-Wno-error=maybe-uninitialized \
CFLAGS_CLANG += \
-Wno-error=parentheses-equality
@@ -48,3 +40,10 @@ INC += \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(ST_CMSIS)/Include \
$(TOP)/$(ST_HAL_DRIVER)/Inc
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
# Linker
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf

4
hw/bsp/stm32u5/boards/b_u585i_iot2a/board.mk
View File

@@ -1,11 +1,9 @@
MCU_VARIANT = stm32u585xx
CFLAGS += \
-DSTM32U585xx \
# All source paths should be relative to the top level.
LD_FILE = ${FAMILY_PATH}/linker/STM32U575xx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
MCU_VARIANT = stm32u585xx
# For flash-jlink target
JLINK_DEVICE = stm32u585zi

4
hw/bsp/stm32u5/boards/stm32u545nucleo/board.mk
View File

@@ -1,11 +1,9 @@
MCU_VARIANT = stm32u545xx
CFLAGS += \
-DSTM32U545xx \
# All source paths should be relative to the top level.
LD_FILE = ${FAMILY_PATH}/linker/STM32U545xx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u545xx.s
MCU_VARIANT = stm32u545xx
# For flash-jlink target
JLINK_DEVICE = stm32u545re

4
hw/bsp/stm32u5/boards/stm32u575eval/board.mk
View File

@@ -1,11 +1,9 @@
MCU_VARIANT = stm32u575xx
CFLAGS += \
-DSTM32U575xx \
# All source paths should be relative to the top level.
LD_FILE = ${FAMILY_PATH}/linker/STM32U575xx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
MCU_VARIANT = stm32u575xx
# For flash-jlink target
JLINK_DEVICE = stm32u575ai

4
hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
View File

@@ -1,11 +1,9 @@
MCU_VARIANT = stm32u575xx
CFLAGS += \
-DSTM32U575xx \
# All source paths should be relative to the top level.
LD_FILE = ${FAMILY_PATH}/linker/STM32U575xx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
MCU_VARIANT = stm32u575xx
# For flash-jlink target
JLINK_DEVICE = stm32u575zi

4
hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.mk
View File

@@ -1,3 +1,4 @@
MCU_VARIANT = stm32u5a5xx
CFLAGS += \
-DSTM32U5A5xx \
-DHSE_VALUE=16000000UL \
@@ -5,8 +6,5 @@ CFLAGS += \
# All source paths should be relative to the top level.
LD_FILE = ${BOARD_PATH}/STM32U5A5ZJTXQ_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u5a5xx.s
MCU_VARIANT = stm32u5a5xx
# For flash-jlink target
JLINK_DEVICE = stm32u575zi

7
hw/bsp/stm32u5/family.mk
View File

@@ -57,5 +57,12 @@ INC += \
$(TOP)/$(ST_HAL_DRIVER)/Inc \
$(TOP)/$(BOARD_PATH)
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
# Linker
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
# flash target using on-board stlink
flash: flash-stlink

45
hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld
View File

@@ -3,21 +3,26 @@
**
** File : stm32wb55xx_flash_cm4.ld
**
** Abstract : System Workbench Minimal System calls file
** Author : STM32CubeIDE
**
** For more information about which c-functions
** need which of these lowlevel functions
** please consult the Newlib libc-manual
** Abstract : Linker script for STM32WB55xx Device
** 1024Kbytes FLASH
** 128Kbytes RAM
**
** Environment : System Workbench for MCU
** Set heap size, stack size and stack location according
** to application requirements.
**
** Distribution: The file is distributed “as is,” without any warranty
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Distribution: The file is distributed as is without any warranty
** of any kind.
**
*****************************************************************************
** @attention
**
** Copyright (c) 2019 STMicroelectronics.
** Copyright (c) 2019-2022 STMicroelectronics.
** All rights reserved.
**
** This software is licensed under terms that can be found in the LICENSE file
@@ -33,7 +38,7 @@ ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = 0x20030000; /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x400; /* required amount of heap */
_Min_Heap_Size = 0x400; /* required amount of heap */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Specify the memory areas */
@@ -81,14 +86,17 @@ SECTIONS
. = ALIGN(4);
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
@@ -124,7 +132,6 @@ SECTIONS
_edata = .; /* define a global symbol at data end */
} >RAM1 AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
@@ -152,8 +159,6 @@ SECTIONS
. = ALIGN(8);
} >RAM1
/* Remove information from the standard libraries */
/DISCARD/ :
{
@@ -163,7 +168,15 @@ SECTIONS
}
.ARM.attributes 0 : { *(.ARM.attributes) }
MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
/* used by the startup to initialize .MB_MEM2 data */
_siMB_MEM2 = LOADADDR(.MB_MEM2);
.MB_MEM2 :
{
_sMB_MEM2 = . ;
*(MB_MEM2) ;
_eMB_MEM2 = . ;
} >RAM_SHARED AT> FLASH
}

5
hw/bsp/stm32wb/family.c
View File

@@ -184,8 +184,7 @@ void HardFault_Handler(void) {
asm("bkpt 1");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
// Required by __libc_init_array in startup code if we are compiling using -nostdlib/-nostartfiles.
void _init(void);
void _init(void) {
}

21
hw/bsp/stm32wb/family.mk
View File

@@ -9,14 +9,12 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32WB
# suppress warning caused by vendor mcu driver
CFLAGS += -Wno-error=cast-align -Wno-unused-parameter
LD_FILE ?= ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_cm4.ld
CFLAGS_GCC += \
-flto \
-nostdlib -nostartfiles \
-Wno-error=cast-align -Wno-unused-parameter
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
@@ -25,19 +23,26 @@ SRC_C += \
$(ST_CMSIS)/Source/Templates/system_${ST_PREFIX}.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_cortex.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr_ex.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc_ex.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_gpio.c
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}_cm4.s
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(ST_CMSIS)/Include \
$(TOP)/$(ST_HAL_DRIVER)/Inc
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_cm4.s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT)_cm4.s
# Linker
LD_FILE_GCC ?= ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_cm4.ld
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash_cm4.icf
# flash target using on-board stlink
flash: flash-stlink