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adding toolchain file from sdk

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This commit is contained in:
hathach
2018-03-20 22:11:29 +07:00
parent ba88d9bc16
commit 64c43634e2
9 changed files with 806 additions and 20 deletions
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42
examples/device/nrf52840/segger/nrf52840.emProject
View File

@@ -19,7 +19,7 @@
arm_target_device_name="nRF52840_xxAA"
arm_target_interface_type="SWD"
c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_PCA10056"
c_user_include_directories="$(ProjectDir)/CMSIS_4/CMSIS/Include;$(ProjectDir)/nRF/CMSIS/Device/Include;$(RepoDir)/hw/cmsis/Include;$(RepoDir)/hw;$(McuDir)/hal;$(RepoDir)/tinyusb;$(McuDir)/sdk;$(McuDir)/sdk/drivers_nrf/hal;$(McuDir)/sdk/drivers_nrf/systick;$(McuDir)/sdk/drivers_nrf/uart;$(McuDir)/sdk/drivers_nrf/usbd;$(McuDir)/sdk/drivers_nrf/common;$(McuDir)/sdk/drivers_nrf/delay;$(McuDir)/sdk/drivers_nrf/power;$(McuDir)/sdk/drivers_nrf/clock;$(McuDir)/sdk/external/fprintf;$(McuDir)/sdk/libraries/util;$(McuDir)/sdk/libraries/strerror;$(McuDir)/sdk/libraries/atomic;$(McuDir)/sdk/libraries/balloc;$(McuDir)/sdk/libraries/experimental_log/src;$(McuDir)/sdk/libraries/experimental_log;$(McuDir)/sdk/libraries/experimental_section_vars;$(McuDir)/sdk/libraries/experimental_memobj;$(McuDir)/sdk/softdevice/s140/headers;$(McuDir)/sdk/softdevice/s140/headers/nrf52;$(McuDir)/sdk/softdevice/common;../src"
c_user_include_directories="$(ProjectDir)/nRF/CMSIS/Device/Include;$(RepoDir)/hw/cmsis/Include;$(RepoDir)/hw;$(McuDir)/hal;$(RepoDir)/tinyusb;$(McuDir)/sdk;$(McuDir)/sdk/device;$(McuDir)/sdk/drivers_nrf/hal;$(McuDir)/sdk/drivers_nrf/systick;$(McuDir)/sdk/drivers_nrf/uart;$(McuDir)/sdk/drivers_nrf/usbd;$(McuDir)/sdk/drivers_nrf/common;$(McuDir)/sdk/drivers_nrf/delay;$(McuDir)/sdk/drivers_nrf/power;$(McuDir)/sdk/drivers_nrf/clock;$(McuDir)/sdk/external/fprintf;$(McuDir)/sdk/libraries/util;$(McuDir)/sdk/libraries/strerror;$(McuDir)/sdk/libraries/atomic;$(McuDir)/sdk/libraries/balloc;$(McuDir)/sdk/libraries/experimental_log/src;$(McuDir)/sdk/libraries/experimental_log;$(McuDir)/sdk/libraries/experimental_section_vars;$(McuDir)/sdk/libraries/experimental_memobj;$(McuDir)/sdk/softdevice/s140/headers;$(McuDir)/sdk/softdevice/s140/headers/nrf52;$(McuDir)/sdk/softdevice/common;../src"
debug_register_definition_file="$(ProjectDir)/nrf52840_Registers.xml"
debug_target_connection="J-Link"
gcc_entry_point="Reset_Handler"
@@ -31,15 +31,6 @@
target_reset_script="Reset();"
target_script_file="$(ProjectDir)/nRF_Target.js"
target_trace_initialize_script="EnableTrace("$(TraceInterfaceType)")" />
<folder Name="CMSIS Files">
<file file_name="nrf.h" />
<file file_name="system_nrf52840.c">
<configuration
Name="Common"
default_code_section=".init"
default_const_section=".init_rodata" />
</file>
</folder>
<folder Name="RTT Files">
<file file_name="SEGGER_RTT.c" />
<file file_name="SEGGER_RTT.h" />
@@ -53,10 +44,6 @@
</folder>
<folder Name="System Files">
<file file_name="thumb_crt0.s" />
<file file_name="ses_nRF_Startup.s" />
<file file_name="ses_nrf52840_Vectors.s">
<configuration Name="Common" file_type="Assembly" />
</file>
</folder>
<folder
Name="tinyusb"
@@ -85,12 +72,27 @@
<file file_name="../../../../hw/mcu/nordic/nrf52/tusb_port/dcd_nrf52.c" />
<file file_name="../../../../hw/mcu/nordic/nrf52/tusb_port/dcd_nrf52.h" />
</folder>
<folder
Name="sdk"
exclude=""
filter="*.c;*.h"
path="../../../../hw/mcu/nordic/nrf52/sdk"
recurse="Yes" />
<folder Name="sdk">
<file file_name="../../../../hw/mcu/nordic/nrf52/sdk/sdk_config.h" />
<folder
Name="device"
path="../../../../hw/mcu/nordic/nrf52/sdk/device" />
<folder
Name="documentation"
path="../../../../hw/mcu/nordic/nrf52/sdk/documentation" />
<folder
Name="drivers_nrf"
path="../../../../hw/mcu/nordic/nrf52/sdk/drivers_nrf" />
<folder
Name="libraries"
path="../../../../hw/mcu/nordic/nrf52/sdk/libraries" />
<folder
Name="softdevice"
path="../../../../hw/mcu/nordic/nrf52/sdk/softdevice" />
<folder
Name="toolchain"
path="../../../../hw/mcu/nordic/nrf52/sdk/toolchain" />
</folder>
</folder>
</folder>
</folder>

148
examples/device/nrf52840/segger/ses_nRF_Startup.s
View File

@@ -1,148 +0,0 @@
/*****************************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* Solutions for real time microcontroller applications *
*****************************************************************************
* *
* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: www.segger.com Support: support@segger.com *
* *
*****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions *
* ------------------------ *
* NO_FPU_ENABLE *
* *
* If defined, FPU will not be enabled. *
* *
* NO_STACK_INIT *
* *
* If defined, the stack pointer will not be initialised. *
* *
* NO_SYSTEM_INIT *
* *
* If defined, the SystemInit() function will not be called. By default *
* SystemInit() is called after reset to enable the clocks and memories to *
* be initialised prior to any C startup initialisation. *
* *
* NO_VTOR_CONFIG *
* *
* If defined, the vector table offset register will not be configured. *
* *
* MEMORY_INIT *
* *
* If defined, the MemoryInit() function will be called. By default *
* MemoryInit() is called after SystemInit() to enable an external memory *
* controller. *
* *
* STACK_INIT_VAL *
* *
* If defined, specifies the initial stack pointer value. If undefined, *
* the stack pointer will be initialised to point to the end of the *
* RAM segment. *
* *
* VECTORS_IN_RAM *
* *
* If defined, the exception vectors will be copied from Flash to RAM. *
* *
*****************************************************************************/
.syntax unified
.global Reset_Handler
#ifdef INITIALIZE_USER_SECTIONS
.global InitializeUserMemorySections
#endif
.extern _vectors
.section .init, "ax"
.thumb_func
.equ VTOR_REG, 0xE000ED08
.equ FPU_CPACR_REG, 0xE000ED88
#ifndef STACK_INIT_VAL
#define STACK_INIT_VAL __RAM_segment_end__
#endif
Reset_Handler:
#ifndef NO_STACK_INIT
/* Initialise main stack */
ldr r0, =STACK_INIT_VAL
ldr r1, =0x7
bics r0, r1
mov sp, r0
#endif
#ifndef NO_SYSTEM_INIT
/* Initialise system */
ldr r0, =SystemInit
blx r0
#endif
#ifdef MEMORY_INIT
ldr r0, =MemoryInit
blx r0
#endif
#ifdef VECTORS_IN_RAM
/* Copy exception vectors into RAM */
ldr r0, =__vectors_start__
ldr r1, =__vectors_end__
ldr r2, =__vectors_ram_start__
1:
cmp r0, r1
beq 2f
ldr r3, [r0]
str r3, [r2]
adds r0, r0, #4
adds r2, r2, #4
b 1b
2:
#endif
#ifndef NO_VTOR_CONFIG
/* Configure vector table offset register */
ldr r0, =VTOR_REG
#ifdef VECTORS_IN_RAM
ldr r1, =_vectors_ram
#else
ldr r1, =_vectors
#endif
str r1, [r0]
#endif
#if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE)
/* Enable FPU */
ldr r0, =FPU_CPACR_REG
ldr r1, [r0]
orr r1, r1, #(0xF << 20)
str r1, [r0]
dsb
isb
#endif
/* Jump to program start */
b _start
#ifdef INITIALIZE_USER_SECTIONS
.thumb_func
InitializeUserMemorySections:
ldr r0, =__start_nrf_sections
ldr r1, =__start_nrf_sections_run
ldr r2, =__end_nrf_sections_run
cmp r0, r1
beq 2f
subs r2, r2, r1
beq 2f
1:
ldrb r3, [r0]
adds r0, r0, #1
strb r3, [r1]
adds r1, r1, #1
subs r2, r2, #1
bne 1b
2:
bx lr
#endif

513
examples/device/nrf52840/segger/ses_nrf52840_Vectors.s
View File

@@ -1,513 +0,0 @@
/*****************************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* Solutions for real time microcontroller applications *
*****************************************************************************
* *
* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: www.segger.com Support: support@segger.com *
* *
*****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions *
* ------------------------ *
* VECTORS_IN_RAM *
* *
* If defined, an area of RAM will large enough to store the vector table *
* will be reserved. *
* *
*****************************************************************************/
.syntax unified
.code 16
.section .init, "ax"
.align 0
/*****************************************************************************
* Default Exception Handlers *
*****************************************************************************/
.thumb_func
.weak NMI_Handler
NMI_Handler:
b .
.thumb_func
.weak HardFault_Handler
HardFault_Handler:
b .
.thumb_func
.weak MemoryManagement_Handler
MemoryManagement_Handler:
b .
.thumb_func
.weak BusFault_Handler
BusFault_Handler:
b .
.thumb_func
.weak UsageFault_Handler
UsageFault_Handler:
b .
.thumb_func
.weak SVC_Handler
SVC_Handler:
b .
.thumb_func
.weak DebugMon_Handler
DebugMon_Handler:
b .
.thumb_func
.weak PendSV_Handler
PendSV_Handler:
b .
.thumb_func
.weak SysTick_Handler
SysTick_Handler:
b .
.thumb_func
Dummy_Handler:
b .
#if defined(__OPTIMIZATION_SMALL)
.weak POWER_CLOCK_IRQHandler
.thumb_set POWER_CLOCK_IRQHandler,Dummy_Handler
.weak RADIO_IRQHandler
.thumb_set RADIO_IRQHandler,Dummy_Handler
.weak UARTE0_UART0_IRQHandler
.thumb_set UARTE0_UART0_IRQHandler,Dummy_Handler
.weak SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.thumb_set SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler,Dummy_Handler
.weak SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.thumb_set SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler,Dummy_Handler
.weak NFCT_IRQHandler
.thumb_set NFCT_IRQHandler,Dummy_Handler
.weak GPIOTE_IRQHandler
.thumb_set GPIOTE_IRQHandler,Dummy_Handler
.weak SAADC_IRQHandler
.thumb_set SAADC_IRQHandler,Dummy_Handler
.weak TIMER0_IRQHandler
.thumb_set TIMER0_IRQHandler,Dummy_Handler
.weak TIMER1_IRQHandler
.thumb_set TIMER1_IRQHandler,Dummy_Handler
.weak TIMER2_IRQHandler
.thumb_set TIMER2_IRQHandler,Dummy_Handler
.weak RTC0_IRQHandler
.thumb_set RTC0_IRQHandler,Dummy_Handler
.weak TEMP_IRQHandler
.thumb_set TEMP_IRQHandler,Dummy_Handler
.weak RNG_IRQHandler
.thumb_set RNG_IRQHandler,Dummy_Handler
.weak ECB_IRQHandler
.thumb_set ECB_IRQHandler,Dummy_Handler
.weak CCM_AAR_IRQHandler
.thumb_set CCM_AAR_IRQHandler,Dummy_Handler
.weak WDT_IRQHandler
.thumb_set WDT_IRQHandler,Dummy_Handler
.weak RTC1_IRQHandler
.thumb_set RTC1_IRQHandler,Dummy_Handler
.weak QDEC_IRQHandler
.thumb_set QDEC_IRQHandler,Dummy_Handler
.weak COMP_LPCOMP_IRQHandler
.thumb_set COMP_LPCOMP_IRQHandler,Dummy_Handler
.weak SWI0_EGU0_IRQHandler
.thumb_set SWI0_EGU0_IRQHandler,Dummy_Handler
.weak SWI1_EGU1_IRQHandler
.thumb_set SWI1_EGU1_IRQHandler,Dummy_Handler
.weak SWI2_EGU2_IRQHandler
.thumb_set SWI2_EGU2_IRQHandler,Dummy_Handler
.weak SWI3_EGU3_IRQHandler
.thumb_set SWI3_EGU3_IRQHandler,Dummy_Handler
.weak SWI4_EGU4_IRQHandler
.thumb_set SWI4_EGU4_IRQHandler,Dummy_Handler
.weak SWI5_EGU5_IRQHandler
.thumb_set SWI5_EGU5_IRQHandler,Dummy_Handler
.weak TIMER3_IRQHandler
.thumb_set TIMER3_IRQHandler,Dummy_Handler
.weak TIMER4_IRQHandler
.thumb_set TIMER4_IRQHandler,Dummy_Handler
.weak PWM0_IRQHandler
.thumb_set PWM0_IRQHandler,Dummy_Handler
.weak PDM_IRQHandler
.thumb_set PDM_IRQHandler,Dummy_Handler
.weak MWU_IRQHandler
.thumb_set MWU_IRQHandler,Dummy_Handler
.weak PWM1_IRQHandler
.thumb_set PWM1_IRQHandler,Dummy_Handler
.weak PWM2_IRQHandler
.thumb_set PWM2_IRQHandler,Dummy_Handler
.weak SPIM2_SPIS2_SPI2_IRQHandler
.thumb_set SPIM2_SPIS2_SPI2_IRQHandler,Dummy_Handler
.weak RTC2_IRQHandler
.thumb_set RTC2_IRQHandler,Dummy_Handler
.weak I2S_IRQHandler
.thumb_set I2S_IRQHandler,Dummy_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Dummy_Handler
.weak USBD_IRQHandler
.thumb_set USBD_IRQHandler,Dummy_Handler
.weak UARTE1_IRQHandler
.thumb_set UARTE1_IRQHandler,Dummy_Handler
.weak QSPI_IRQHandler
.thumb_set QSPI_IRQHandler,Dummy_Handler
.weak CRYPTOCELL_IRQHandler
.thumb_set CRYPTOCELL_IRQHandler,Dummy_Handler
.weak SPIM3_IRQHandler
.thumb_set SPIM3_IRQHandler,Dummy_Handler
.weak PWM3_IRQHandler
.thumb_set PWM3_IRQHandler,Dummy_Handler
#else
.thumb_func
.weak POWER_CLOCK_IRQHandler
POWER_CLOCK_IRQHandler:
b .
.thumb_func
.weak RADIO_IRQHandler
RADIO_IRQHandler:
b .
.thumb_func
.weak UARTE0_UART0_IRQHandler
UARTE0_UART0_IRQHandler:
b .
.thumb_func
.weak SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler:
b .
.thumb_func
.weak SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler:
b .
.thumb_func
.weak NFCT_IRQHandler
NFCT_IRQHandler:
b .
.thumb_func
.weak GPIOTE_IRQHandler
GPIOTE_IRQHandler:
b .
.thumb_func
.weak SAADC_IRQHandler
SAADC_IRQHandler:
b .
.thumb_func
.weak TIMER0_IRQHandler
TIMER0_IRQHandler:
b .
.thumb_func
.weak TIMER1_IRQHandler
TIMER1_IRQHandler:
b .
.thumb_func
.weak TIMER2_IRQHandler
TIMER2_IRQHandler:
b .
.thumb_func
.weak RTC0_IRQHandler
RTC0_IRQHandler:
b .
.thumb_func
.weak TEMP_IRQHandler
TEMP_IRQHandler:
b .
.thumb_func
.weak RNG_IRQHandler
RNG_IRQHandler:
b .
.thumb_func
.weak ECB_IRQHandler
ECB_IRQHandler:
b .
.thumb_func
.weak CCM_AAR_IRQHandler
CCM_AAR_IRQHandler:
b .
.thumb_func
.weak WDT_IRQHandler
WDT_IRQHandler:
b .
.thumb_func
.weak RTC1_IRQHandler
RTC1_IRQHandler:
b .
.thumb_func
.weak QDEC_IRQHandler
QDEC_IRQHandler:
b .
.thumb_func
.weak COMP_LPCOMP_IRQHandler
COMP_LPCOMP_IRQHandler:
b .
.thumb_func
.weak SWI0_EGU0_IRQHandler
SWI0_EGU0_IRQHandler:
b .
.thumb_func
.weak SWI1_EGU1_IRQHandler
SWI1_EGU1_IRQHandler:
b .
.thumb_func
.weak SWI2_EGU2_IRQHandler
SWI2_EGU2_IRQHandler:
b .
.thumb_func
.weak SWI3_EGU3_IRQHandler
SWI3_EGU3_IRQHandler:
b .
.thumb_func
.weak SWI4_EGU4_IRQHandler
SWI4_EGU4_IRQHandler:
b .
.thumb_func
.weak SWI5_EGU5_IRQHandler
SWI5_EGU5_IRQHandler:
b .
.thumb_func
.weak TIMER3_IRQHandler
TIMER3_IRQHandler:
b .
.thumb_func
.weak TIMER4_IRQHandler
TIMER4_IRQHandler:
b .
.thumb_func
.weak PWM0_IRQHandler
PWM0_IRQHandler:
b .
.thumb_func
.weak PDM_IRQHandler
PDM_IRQHandler:
b .
.thumb_func
.weak MWU_IRQHandler
MWU_IRQHandler:
b .
.thumb_func
.weak PWM1_IRQHandler
PWM1_IRQHandler:
b .
.thumb_func
.weak PWM2_IRQHandler
PWM2_IRQHandler:
b .
.thumb_func
.weak SPIM2_SPIS2_SPI2_IRQHandler
SPIM2_SPIS2_SPI2_IRQHandler:
b .
.thumb_func
.weak RTC2_IRQHandler
RTC2_IRQHandler:
b .
.thumb_func
.weak I2S_IRQHandler
I2S_IRQHandler:
b .
.thumb_func
.weak FPU_IRQHandler
FPU_IRQHandler:
b .
.thumb_func
.weak USBD_IRQHandler
USBD_IRQHandler:
b .
.thumb_func
.weak UARTE1_IRQHandler
UARTE1_IRQHandler:
b .
.thumb_func
.weak QSPI_IRQHandler
QSPI_IRQHandler:
b .
.thumb_func
.weak CRYPTOCELL_IRQHandler
CRYPTOCELL_IRQHandler:
b .
.thumb_func
.weak SPIM3_IRQHandler
SPIM3_IRQHandler:
b .
.thumb_func
.weak PWM3_IRQHandler
PWM3_IRQHandler:
b .
#endif
/*****************************************************************************
* Vector Table *
*****************************************************************************/
.section .vectors, "ax"
.align 0
.global _vectors
.extern __stack_end__
.extern Reset_Handler
_vectors:
.word __stack_end__
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemoryManagement_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SVC_Handler
.word DebugMon_Handler
.word 0 /* Reserved */
.word PendSV_Handler
.word SysTick_Handler
.word POWER_CLOCK_IRQHandler
.word RADIO_IRQHandler
.word UARTE0_UART0_IRQHandler
.word SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.word SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.word NFCT_IRQHandler
.word GPIOTE_IRQHandler
.word SAADC_IRQHandler
.word TIMER0_IRQHandler
.word TIMER1_IRQHandler
.word TIMER2_IRQHandler
.word RTC0_IRQHandler
.word TEMP_IRQHandler
.word RNG_IRQHandler
.word ECB_IRQHandler
.word CCM_AAR_IRQHandler
.word WDT_IRQHandler
.word RTC1_IRQHandler
.word QDEC_IRQHandler
.word COMP_LPCOMP_IRQHandler
.word SWI0_EGU0_IRQHandler
.word SWI1_EGU1_IRQHandler
.word SWI2_EGU2_IRQHandler
.word SWI3_EGU3_IRQHandler
.word SWI4_EGU4_IRQHandler
.word SWI5_EGU5_IRQHandler
.word TIMER3_IRQHandler
.word TIMER4_IRQHandler
.word PWM0_IRQHandler
.word PDM_IRQHandler
.word Dummy_Handler /* Reserved */
.word Dummy_Handler /* Reserved */
.word MWU_IRQHandler
.word PWM1_IRQHandler
.word PWM2_IRQHandler
.word SPIM2_SPIS2_SPI2_IRQHandler
.word RTC2_IRQHandler
.word I2S_IRQHandler
.word FPU_IRQHandler
.word USBD_IRQHandler
.word UARTE1_IRQHandler
.word QSPI_IRQHandler
.word CRYPTOCELL_IRQHandler
.word SPIM3_IRQHandler
.word Dummy_Handler /* Reserved */
.word PWM3_IRQHandler
_vectors_end:
#ifdef VECTORS_IN_RAM
.section .vectors_ram, "ax"
.align 0
.global _vectors_ram
_vectors_ram:
.space _vectors_end - _vectors, 0
#endif

256
examples/device/nrf52840/segger/system_nrf52840.c
View File

@@ -1,256 +0,0 @@
/*
Copyright (c) 2009-2017 ARM Limited. All rights reserved.
SPDX-License-Identifier: Apache-2.0
Licensed under the Apache License, Version 2.0 (the License); you may
not use this file except in compliance with the License.
You may obtain a copy of the License at
www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an AS IS BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
NOTICE: This file has been modified by Nordic Semiconductor ASA.
*/
/* NOTE: Template files (including this one) are application specific and therefore expected to
be copied into the application project folder prior to its use! */
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf52840.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK_64M (64000000UL)
static bool errata_36(void);
static bool errata_66(void);
static bool errata_98(void);
static bool errata_103(void);
static bool errata_115(void);
static bool errata_120(void);
static bool errata_136(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK_64M;
}
void SystemInit(void)
{
/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
Specification to see which one). */
#if defined (ENABLE_SWO)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
Specification to see which ones). */
#if defined (ENABLE_TRACE)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[7] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
NRF_CLOCK->CTIV = 0;
}
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
}
/* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_98()){
*(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
}
/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_103()){
NRF_CCM->MAXPACKETSIZE = 0xFBul;
}
/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_115()){
*(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
}
/* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_120()){
*(volatile uint32_t *)0x40029640ul = 0x200ul;
}
/* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_136()){
if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
NRF_POWER->RESETREAS = ~POWER_RESETREAS_RESETPIN_Msk;
}
}
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
* operations are not used in your code. */
#if (__FPU_USED == 1)
SCB->CPACR |= (3UL << 20) | (3UL << 22);
__DSB();
__ISB();
#endif
/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
normal GPIOs. */
#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
#if defined (CONFIG_GPIO_AS_PINRESET)
if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[0] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[1] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
SystemCoreClockUpdate();
}
static bool errata_36(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_66(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_98(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_103(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_115(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_120(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_136(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
/*lint --flb "Leave library region" */