usb通信成功
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This commit is contained in:
@@ -36,7 +36,7 @@
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#define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
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#define USB_PID (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
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_PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
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_PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
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#define USB_VID 0x0843
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#define USB_VID 0xcafe
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#define USB_BCD 0x0200
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#define USB_BCD 0x0200
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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@@ -217,7 +217,7 @@ char const *string_desc_arr[] = {
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(const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
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(const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
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"TinyUSB", // 1: Manufacturer
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"TinyUSB", // 1: Manufacturer
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"TinyUSB Device", // 2: Product
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"TinyUSB Device", // 2: Product
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NULL, // 3: Serials will use unique ID if possible
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"20250922", // 3: Serials will use unique ID if possible
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"TinyUSB CDC", // 4: CDC Interface
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"TinyUSB CDC", // 4: CDC Interface
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};
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};
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@@ -28,6 +28,7 @@
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#include "bsp_init.h"
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#include "bsp_init.h"
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#include "stm32f4xx.h"
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#include "stm32f4xx.h"
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#include "dcd.h"
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#include "dcd.h"
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#include <ctype.h>
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#define DBG_TAG "TinyUSB"
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#define DBG_TAG "TinyUSB"
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#define DBG_LVL DBG_INFO
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#define DBG_LVL DBG_INFO
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@@ -40,6 +41,10 @@ static rt_uint8_t tusb_stack[PKG_TINYUSB_STACK_SIZE];
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static struct rt_thread tusb_thread;
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static struct rt_thread tusb_thread;
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#endif /* RT_USING_HEAP */
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#endif /* RT_USING_HEAP */
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struct rt_semaphore g_dcd_sem;
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int tusb_board_init(void) {
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int tusb_board_init(void) {
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitTypeDef GPIO_InitStructure;
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@@ -83,12 +88,21 @@ static void tusb_thread_entry(void *parameter)
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#endif
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#endif
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}
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}
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}
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}
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static void cdc_task(void *parameter);
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static int init_tinyusb(void)
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static int init_tinyusb(void)
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{
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{
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rt_thread_t tid;
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rt_thread_t tid;
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RCC_ClocksTypeDef rcc = {0};
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RCC_GetClocksFreq(&rcc);
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rt_kprintf("TinyUSB init... \r\n");
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rt_kprintf("rcc.SYSCLK_Frequency=%d Hz\r\n", rcc.SYSCLK_Frequency);
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rt_kprintf("rcc.HCLK_Frequency=%d Hz\r\n", rcc.HCLK_Frequency);
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rt_kprintf("rcc.PCLK1_Frequency=%d Hz\r\n", rcc.PCLK1_Frequency);
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rt_kprintf("rcc.PCLK2_Frequency=%d Hz\r\n", rcc.PCLK2_Frequency);
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rt_kprintf("rcc.USBCLK_Frequency=%d Hz\r\n", rcc.USBCLK_Frequency);
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tusb_board_init();
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tusb_board_init();
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rt_sem_init(&g_dcd_sem, "tusb_cdc", 0, RT_IPC_FLAG_PRIO);
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//call tusb_rhport_init()
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//call tusb_rhport_init()
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tusb_init();
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tusb_init();
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@@ -99,7 +113,7 @@ static int init_tinyusb(void)
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#ifdef RT_USING_HEAP
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#ifdef RT_USING_HEAP
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tid = rt_thread_create("tusb", tusb_thread_entry, RT_NULL,
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tid = rt_thread_create("tusb", tusb_thread_entry, RT_NULL,
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2048,
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2048,
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5, 10);
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1, 10);
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if (tid == RT_NULL)
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if (tid == RT_NULL)
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#else
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#else
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rt_err_t result;
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rt_err_t result;
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@@ -116,8 +130,72 @@ static int init_tinyusb(void)
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rt_thread_startup(tid);
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rt_thread_startup(tid);
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tid = rt_thread_create("tusb_cdc", cdc_task, RT_NULL,
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2048,
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6, 10);
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rt_thread_startup(tid);
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return 0;
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return 0;
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}
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}
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// INIT_APP_EXPORT(init_tinyusb);
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// INIT_APP_EXPORT(init_tinyusb);
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extern_init(tinyusb, init_tinyusb);
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extern_init(tinyusb, init_tinyusb);
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static void echo_serial_port(uint8_t itf, uint8_t buf[], uint32_t count) {
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uint8_t const case_diff = 'a' - 'A';
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for (uint32_t i = 0; i < count; i++) {
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if (itf == 0) {
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// echo back 1st port as lower case
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if (isupper(buf[i])) buf[i] += case_diff;
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} else {
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// echo back 2nd port as upper case
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if (islower(buf[i])) buf[i] -= case_diff;
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}
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tud_cdc_n_write_char(itf, buf[i]);
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}
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tud_cdc_n_write_flush(itf);
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}
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// notify cdc task recv data
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void tud_cdc_rx_cb(uint8_t itf){
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TU_LOG(2, "tud_cdc_rx_cb\r\n");
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rt_sem_release(&g_dcd_sem);
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}
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static void cdc_task(void *parameter) {
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TU_LOG(2, "CDC task started\r\n");
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while(1){
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rt_sem_take(&g_dcd_sem, RT_WAITING_FOREVER);
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TU_LOG(2, "tud_cdc_rx_take\r\n");
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for (uint8_t itf = 0; itf < CFG_TUD_CDC; itf++) {
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// connected() check for DTR bit
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// Most but not all terminal client set this when making connection
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// if ( tud_cdc_n_connected(itf) )
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{
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if (tud_cdc_n_available(itf)) {
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uint8_t buf[64];
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uint32_t count = tud_cdc_n_read(itf, buf, sizeof(buf));
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// echo back to both serial ports
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echo_serial_port(0, buf, count);
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echo_serial_port(1, buf, count);
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}
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}
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}
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}
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}
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#endif /*__RTTHREAD__*/
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#endif /*__RTTHREAD__*/
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@@ -340,6 +340,7 @@ uint16_t cdcd_open(uint8_t rhport, const tusb_desc_interface_t* itf_desc, uint16
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// Only support ACM subclass
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// Only support ACM subclass
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TU_VERIFY( TUSB_CLASS_CDC == itf_desc->bInterfaceClass &&
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TU_VERIFY( TUSB_CLASS_CDC == itf_desc->bInterfaceClass &&
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CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass, 0);
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CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass, 0);
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TU_LOG(2,"CDC Interface %u\r\n", itf_desc->bInterfaceNumber);
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// Find available interface
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// Find available interface
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cdcd_interface_t* p_cdc;
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cdcd_interface_t* p_cdc;
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@@ -35,6 +35,14 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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// Enable device interrupt
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extern void dcd_int_enable (uint8_t rhport);
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// Disable device interrupt
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extern void dcd_int_disable(uint8_t rhport);
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// TASK API
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// TASK API
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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@@ -51,24 +59,21 @@ typedef struct rt_mutex osal_spinlock_t;
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osal_spinlock_t _name
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osal_spinlock_t _name
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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// rt_spin_lock_init(ctx);
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rt_mutex_init(ctx, "tusb", RT_IPC_FLAG_PRIO);
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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return; // single core MCU does not need to lock in ISR
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return; // single core MCU does not need to lock in ISR
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}
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}
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// rt_spin_lock(ctx);
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dcd_int_disable(1);
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rt_mutex_take(ctx, RT_WAITING_FOREVER);
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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return; // single core MCU does not need to lock in ISR
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return; // single core MCU does not need to lock in ISR
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}
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}
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// rt_spin_unlock(ctx);
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dcd_int_enable(1);
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rt_mutex_release(ctx);
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}
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}
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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@@ -163,7 +168,12 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, v
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TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
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TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
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(void) in_isr;
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(void) in_isr;
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return rt_mq_send(qhdl, (void *)data, qhdl->msg_size) == RT_EOK;
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int ret;
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ret = rt_mq_send(qhdl, (void *) data, qhdl->msg_size);
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if (ret != RT_EOK) {
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rt_kprintf("osal_queue_send failed ret=%d\n", ret);
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}
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return ret == RT_EOK;
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}
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}
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TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
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TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
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@@ -85,9 +85,9 @@ static void phy_fs_init(dwc2_regs_t* dwc2) {
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gusbcfg &= ~GUSBCFG_TRDT_Msk;
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gusbcfg &= ~GUSBCFG_TRDT_Msk;
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gusbcfg |= 5u << GUSBCFG_TRDT_Pos;
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gusbcfg |= 5u << GUSBCFG_TRDT_Pos;
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// force to device mode
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// force to device mode
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gusbcfg |= GUSBCFG_FDMOD;
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// gusbcfg |= GUSBCFG_FDMOD;
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dwc2->gusbcfg = gusbcfg;
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dwc2->gusbcfg = gusbcfg;
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osal_task_delay(50);
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// osal_task_delay(50);
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// MCU specific PHY update post reset
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// MCU specific PHY update post reset
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dwc2_phy_update(dwc2, GHWCFG2_HSPHY_NOT_SUPPORTED);
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dwc2_phy_update(dwc2, GHWCFG2_HSPHY_NOT_SUPPORTED);
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@@ -273,7 +273,7 @@ static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
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turnaround = 0xCu;
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turnaround = 0xCu;
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}
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}
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else if (SystemCoreClock >= 16000000u) {
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else if (SystemCoreClock >= 16000000u) {
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turnaround = 0xfu;
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turnaround = 0xdu;
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}
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}
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else if (SystemCoreClock >= 15000000u) {
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else if (SystemCoreClock >= 15000000u) {
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turnaround = 0xEu;
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turnaround = 0xEu;
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