fix build warnings
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		| @@ -110,15 +110,15 @@ typedef struct | ||||
|  | ||||
| // clean/flush data cache: write cache -> memory. | ||||
| // Required before an DMA TX transfer to make sure data is in memory | ||||
| void hcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK; | ||||
| void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK; | ||||
|  | ||||
| // invalidate data cache: mark cache as invalid, next read will read from memory | ||||
| // Required BOTH before and after an DMA RX transfer | ||||
| void hcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; | ||||
| void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; | ||||
|  | ||||
| // clean and invalidate data cache | ||||
| // Required before an DMA transfer where memory is both read/write by DMA | ||||
| void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK; | ||||
| void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK; | ||||
|  | ||||
| //--------------------------------------------------------------------+ | ||||
| // Controller API | ||||
|   | ||||
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