correct dcd_pipe_is_busy to use list_qtd_idx[] instead of qtd_overlay
flush usbd_queue_hdl when bus_reset add assert check for osal_queue_send increase ENUM_QUEUE_DEPTH for usbh change osal_freeRTOS.h implementation to - correctly waiting forever for semaphore wait, queue & mutex - not use ISR safe version since it is not as generic as we want
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		@@ -151,7 +151,7 @@ typedef struct ATTR_ALIGNED(64) {
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	/// thus there are 16 bytes padding free that we can make use of.
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  //--------------------------------------------------------------------+
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  uint8_t class_code; // Class code that endpoint belongs to
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  uint8_t list_qtd_idx[DCD_QTD_PER_QHD_MAX];
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  volatile uint8_t list_qtd_idx[DCD_QTD_PER_QHD_MAX];
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	uint8_t reserved[15-DCD_QTD_PER_QHD_MAX];
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} dcd_qhd_t;
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@@ -167,6 +167,9 @@ typedef struct {
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}dcd_data_t;
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extern ATTR_WEAK dcd_data_t dcd_data0;
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extern ATTR_WEAK dcd_data_t dcd_data1;
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#if (TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_DEVICE)
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TUSB_CFG_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data0;
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#endif
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@@ -176,20 +179,7 @@ TUSB_CFG_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data1;
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#endif
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static LPC_USB0_Type * const LPC_USB[2] = { LPC_USB0, ((LPC_USB0_Type*) LPC_USB1_BASE) };
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static dcd_data_t* const dcd_data_ptr[2] =
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{
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  #if (TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_DEVICE)
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    &dcd_data0,
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  #else
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    NULL,
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  #endif
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  #if (TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_DEVICE)
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    &dcd_data1
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  #else
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    NULL
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  #endif
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};
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static dcd_data_t* const dcd_data_ptr[2] = { &dcd_data0, &dcd_data1 };
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//--------------------------------------------------------------------+
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// CONTROLLER API
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@@ -364,6 +354,7 @@ tusb_error_t dcd_pipe_control_xfer(uint8_t coreid, tusb_direction_t dir, uint8_t
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  uint8_t const ep_status = 1 - ep_data;
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  while(lpc_usb->ENDPTSETUPSTAT & BIT_(0)) {} // wait until ENDPTSETUPSTAT before priming data/status in response
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//  while(p_dcd->qhd[0].qtd_overlay.active || p_dcd->qhd[1].qtd_overlay.active) {}; // wait until previous device request is completed
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  ASSERT_FALSE(p_dcd->qhd[0].qtd_overlay.active || p_dcd->qhd[1].qtd_overlay.active, TUSB_ERROR_FAILED);
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  //------------- Data Phase -------------//
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@@ -454,10 +445,10 @@ endpoint_handle_t dcd_pipe_open(uint8_t coreid, tusb_descriptor_endpoint_t const
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bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
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{
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  dcd_qhd_t* p_qhd = &dcd_data_ptr[edpt_hdl.coreid]->qhd[edpt_hdl.index];
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  dcd_qhd_t const * p_qhd = &dcd_data_ptr[edpt_hdl.coreid]->qhd[edpt_hdl.index];
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  // LPC_USB0->ENDPTSTAT & endpoint_phy2pos(edpt_hdl.index)
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  return !p_qhd->qtd_overlay.halted && p_qhd->qtd_overlay.active;
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  return p_qhd->list_qtd_idx[0] != 0; // qtd list is not empty
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//  return !p_qhd->qtd_overlay.halted && p_qhd->qtd_overlay.active;
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}
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// add only, controller virtually cannot know
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@@ -112,7 +112,7 @@ bool tusbd_is_configured(uint8_t coreid)
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//--------------------------------------------------------------------+
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//------------- OSAL Task -------------//
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enum { USBD_TASK_QUEUE_DEPTH = 8 };
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enum { USBD_TASK_QUEUE_DEPTH = 16 };
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typedef enum {
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  USBD_EVENTID_SETUP_RECEIVED = 1,
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@@ -200,24 +200,23 @@ static tusb_error_t usbd_body_subtask(void)
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  tusb_error_t error;
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  error = TUSB_ERROR_NONE;
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  memclr_(&event, sizeof(usbd_task_event_t));
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  osal_queue_receive(usbd_queue_hdl, &event, OSAL_TIMEOUT_WAIT_FOREVER, &error);
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  SUBTASK_ASSERT_STATUS(error);
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  if ( USBD_EVENTID_SETUP_RECEIVED == event.event_id )
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  {
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    OSAL_SUBTASK_INVOKED_AND_WAIT( usbd_control_request_subtask(event.coreid, &event.setup_received), error );
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  }else
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  }else if (USBD_EVENTID_XFER_DONE == event.event_id)
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  {
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    uint8_t class_index;
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    class_index = std_class_code_to_index( event.xfer_done.edpt_hdl.class_code );
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    if (usbd_class_drivers[class_index].xfer_cb)
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    {
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      usbd_class_drivers[class_index].xfer_cb( event.xfer_done.edpt_hdl, (tusb_event_t) event.sub_event_id, event.xfer_done.xferred_byte);
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    }else
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    {
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      hal_debugger_breakpoint(); // something wrong, no one claims the isr's source
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    }
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    SUBTASK_ASSERT(usbd_class_drivers[class_index].xfer_cb != NULL);
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    usbd_class_drivers[class_index].xfer_cb( event.xfer_done.edpt_hdl, (tusb_event_t) event.sub_event_id, event.xfer_done.xferred_byte);
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  }else
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  {
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    SUBTASK_ASSERT(false);
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  }
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  OSAL_SUBTASK_END
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@@ -400,6 +399,7 @@ void usbd_dcd_bus_event_isr(uint8_t coreid, usbd_bus_event_type_t bus_event)
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    case USBD_BUS_EVENT_RESET     :
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    case USBD_BUS_EVENT_UNPLUGGED :
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      memclr_(&usbd_devices[coreid], sizeof(usbd_device_info_t));
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      osal_queue_flush(usbd_queue_hdl);
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      osal_semaphore_reset(usbd_control_xfer_sem_hdl);
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      for (uint8_t class_code = TUSB_CLASS_AUDIO; class_code < USBD_CLASS_DRIVER_COUNT; class_code++)
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      {
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@@ -424,7 +424,7 @@ void usbd_setup_received_isr(uint8_t coreid, tusb_control_request_t * p_request)
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  };
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  task_event.setup_received  = (*p_request);
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  osal_queue_send(usbd_queue_hdl, &task_event);
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  ASSERT( TUSB_ERROR_NONE == osal_queue_send(usbd_queue_hdl, &task_event), VOID_RETURN);
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}
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void usbd_xfer_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
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@@ -444,7 +444,7 @@ void usbd_xfer_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xfer
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    task_event.xfer_done.xferred_byte = xferred_bytes;
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    task_event.xfer_done.edpt_hdl     = edpt_hdl;
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    osal_queue_send(usbd_queue_hdl, &task_event);
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    ASSERT( TUSB_ERROR_NONE == osal_queue_send(usbd_queue_hdl, &task_event), VOID_RETURN);
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  }
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}
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