Implemented very rudimentary support for isochronous transfer buffer handling
This commit is contained in:
@@ -163,7 +163,7 @@ TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligne
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typedef struct
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{
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uint8_t * buffer;
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// tu_fifo_t * ff; // TODO support dcd_edpt_xfer_fifo API
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tu_fifo_t * ff;
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uint16_t total_len;
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uint16_t queued_len;
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uint16_t pma_ptr;
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@@ -196,8 +196,8 @@ static void dcd_pma_free(uint8_t ep_addr);
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static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
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static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
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//static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes);
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//static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes);
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static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes);
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static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes);
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// Using a function due to better type checks
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// This seems better than having to do type casts everywhere else
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@@ -222,7 +222,7 @@ void dcd_init (uint8_t rhport)
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{
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asm("NOP");
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}
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// Perform USB peripheral reset
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// Perform USB peripheral reset
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USB->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
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for(uint32_t i = 0; i<200; i++) // should be a few us
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{
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@@ -526,15 +526,15 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
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if (count != 0U)
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{
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#if 0 // TODO support dcd_edpt_xfer_fifo API
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uint16_t addr = *pcd_ep_rx_address_ptr(USB, EPindex);
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if (xfer->ff)
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{
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dcd_read_packet_memory_ff(xfer->ff, *pcd_ep_rx_address_ptr(USB,EPindex), count);
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dcd_read_packet_memory_ff(xfer->ff, addr, count);
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}
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else
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#endif
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{
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dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), *pcd_ep_rx_address_ptr(USB,EPindex), count);
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dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), addr, count);
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}
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xfer->queued_len = (uint16_t)(xfer->queued_len + count);
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@@ -683,6 +683,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
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static void dcd_pma_alloc_reset(void)
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{
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open_ep_count = 0;
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ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each)
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//TU_LOG2("dcd_pma_alloc_reset()\r\n");
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for(uint32_t i=0; i<MAX_EP_COUNT; i++)
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@@ -709,6 +710,7 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
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uint8_t const dir = tu_edpt_dir(ep_addr);
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xfer_ctl_t* epXferCtl = xfer_ctl_ptr(epnum,dir);
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open_ep_count++;
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if(epXferCtl->pma_alloc_size != 0U)
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{
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//TU_LOG2("dcd_pma_alloc(%x,%x)=%x (cached)\r\n",ep_addr,length,epXferCtl->pma_ptr);
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@@ -771,9 +773,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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const uint16_t epMaxPktSize = tu_edpt_packet_size(p_endpoint_desc);
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uint16_t pma_addr;
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uint32_t wType;
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// Isochronous not supported (yet), and some other driver assumptions.
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TU_ASSERT(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
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TU_ASSERT(epnum < MAX_EP_COUNT);
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// Set type
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@@ -781,12 +782,9 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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case TUSB_XFER_CONTROL:
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wType = USB_EP_CONTROL;
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break;
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#if (0)
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case TUSB_XFER_ISOCHRONOUS: // FIXME: Not yet supported
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case TUSB_XFER_ISOCHRONOUS:
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wType = USB_EP_ISOCHRONOUS;
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break;
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#endif
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case TUSB_XFER_BULK:
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wType = USB_EP_CONTROL;
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break;
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@@ -805,21 +803,41 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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// or being double-buffered (bulk endpoints)
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pcd_clear_ep_kind(USB,0);
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/* Create a packet memory buffer area. For isochronous endpoints,
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* use the same buffer as the double buffer, essentially disabling double buffering */
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pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, epMaxPktSize);
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#if defined(ISOCHRONOUS_DOUBLEBUFFER)
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if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
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#else
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if(dir == TUSB_DIR_IN)
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#endif
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{
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*pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
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pcd_set_ep_tx_cnt(USB, epnum, epMaxPktSize);
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pcd_clear_tx_dtog(USB, epnum);
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pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_NAK);
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if(wType == USB_EP_ISOCHRONOUS) {
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pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
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} else {
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pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
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}
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}
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#if defined(ISOCHRONOUS_DOUBLEBUFFER)
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if( (dir == TUSB_DIR_OUT) || (wType == USB_EP_ISOCHRONOUS) )
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#else
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else
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#endif
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{
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*pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
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pcd_set_ep_rx_cnt(USB, epnum, epMaxPktSize);
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pcd_clear_rx_dtog(USB, epnum);
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pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
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if(wType == USB_EP_ISOCHRONOUS) {
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pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
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} else {
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pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
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}
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}
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xfer_ctl_ptr(epnum, dir)->max_packet_size = epMaxPktSize;
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@@ -845,10 +863,10 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
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(void)rhport;
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uint32_t const epnum = tu_edpt_number(ep_addr);
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uint32_t const dir = tu_edpt_dir(ep_addr);
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if(dir == TUSB_DIR_IN)
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{
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pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_DIS);
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pcd_set_ep_tx_status(USB,epnum, USB_EP_TX_DIS);
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}
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else
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{
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@@ -868,15 +886,14 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)
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{
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len = xfer->max_packet_size;
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}
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uint16_t oldAddr = *pcd_ep_tx_address_ptr(USB,ep_ix);
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#if 0 // TODO support dcd_edpt_xfer_fifo API
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if (xfer->ff)
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{
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dcd_write_packet_memory_ff(xfer->ff, oldAddr, len);
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}
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else
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#endif
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{
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dcd_write_packet_memory(oldAddr, &(xfer->buffer[xfer->queued_len]), len);
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}
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@@ -896,7 +913,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
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xfer->buffer = buffer;
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// xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API
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xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API
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xfer->total_len = total_bytes;
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xfer->queued_len = 0;
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@@ -908,6 +925,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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{
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xfer->buffer = (uint8_t*)_setup_packet;
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}
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if(total_bytes > xfer->max_packet_size)
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{
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pcd_set_ep_rx_cnt(USB,epnum,xfer->max_packet_size);
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@@ -923,7 +941,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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return true;
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}
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#if 0 // TODO support dcd_edpt_xfer_fifo API
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bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
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{
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(void) rhport;
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@@ -934,7 +951,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
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xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
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xfer->buffer = NULL;
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// xfer->ff = ff; // TODO support dcd_edpt_xfer_fifo API
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xfer->ff = ff; // TODO support dcd_edpt_xfer_fifo API
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xfer->total_len = total_bytes;
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xfer->queued_len = 0;
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@@ -954,7 +971,6 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
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}
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return true;
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}
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#endif
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void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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@@ -978,7 +994,10 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{ // IN
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ep_addr &= 0x7F;
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pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
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uint8_t const epnum = tu_edpt_number(ep_addr);
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if (pcd_get_eptype(USB, epnum) != USB_EP_ISOCHRONOUS) {
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pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
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}
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/* Reset to DATA0 if clearing stall condition. */
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pcd_clear_tx_dtog(USB,ep_addr);
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@@ -1029,7 +1048,6 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
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return true;
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}
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#if 0 // TODO support dcd_edpt_xfer_fifo API
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/**
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* @brief Copy from FIFO to packet memory area (PMA).
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* Uses byte-access of system memory and 16-bit access of packet memory
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@@ -1043,38 +1061,36 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
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{
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// Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
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// Check for first linear part
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void * src;
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uint16_t len = tu_fifo_get_linear_read_info(ff, 0, &src, wNBytes); // We want to read from the FIFO - THIS FUNCTION CHANGED!!!
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TU_VERIFY(len && dcd_write_packet_memory(dst, src, len)); // and write it into the PMA
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tu_fifo_advance_read_pointer(ff, len);
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tu_fifo_buffer_info_t info;
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tu_fifo_get_read_info(ff, &info); // We want to read from the FIFO
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TU_VERIFY(info.len_lin && dcd_write_packet_memory(dst, info.ptr_lin, info.len_lin)); // and write it into the PMA
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tu_fifo_advance_read_pointer(ff, info.len_lin);
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// Check for wrapped part
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if (len < wNBytes)
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if (info.len_wrap)
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{
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// Get remaining wrapped length
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uint16_t len2 = tu_fifo_get_linear_read_info(ff, 0, &src, wNBytes - len);
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TU_VERIFY(len2);
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// Update destination pointer
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dst += len;
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dst += info.len_lin;
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uint8_t* src = (uint8_t*)info.ptr_wrap;
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uint16_t len2 = info.len_wrap;
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// Since PMA is accessed 16-bit wise we need to handle the case when a 16 bit value was split
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if (len % 2) // If len is uneven there is a byte left to copy
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if (info.len_lin % 2) // If len is uneven there is a byte left to copy
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{
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// Since PMA can accessed only 16 bit-wise we copy the last byte again
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tu_fifo_backward_read_pointer(ff, 1); // Move one byte back and copy two bytes for the PMA
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tu_fifo_read_n(ff, (void *) &pma[PMA_STRIDE*(dst>>1)], 2); // Since EP FIFOs must be of item size 1 this is safe to do
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dst++;
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TU_ASSERT(false); // TODO: Step through and check -> untested
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uint16_t temp = ((uint8_t *)info.ptr_lin)[info.len_lin-1] | src[0] << 16; // CHECK endianess
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pma[PMA_STRIDE*(dst>>1)] = temp;
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src++;
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len2--;
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}
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TU_VERIFY(dcd_write_packet_memory(dst, src, len2));
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tu_fifo_advance_write_pointer(ff, len2);
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tu_fifo_advance_write_pointer(ff, info.len_wrap);
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}
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return true;
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}
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#endif
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/**
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* @brief Copy a buffer from packet memory area (PMA) to user memory area.
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@@ -1111,7 +1127,6 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
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return true;
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}
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#if 0 // TODO support dcd_edpt_xfer_fifo API
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/**
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* @brief Copy a buffer from user packet memory area (PMA) to FIFO.
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* Uses byte-access of system memory and 16-bit access of packet memory
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@@ -1125,32 +1140,31 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
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{
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// Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
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// Check for first linear part
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void * dst;
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uint16_t len = tu_fifo_get_linear_write_info(ff, 0, &dst, wNBytes); // THIS FUNCTION CHANGED!!!!
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TU_VERIFY(len && dcd_read_packet_memory(dst, src, len));
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tu_fifo_advance_write_pointer(ff, len);
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tu_fifo_buffer_info_t info;
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tu_fifo_get_write_info(ff, &info); // We want to read from the FIFO
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TU_VERIFY(info.len_lin && dcd_read_packet_memory(info.ptr_lin, src, info.len_lin));
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tu_fifo_advance_write_pointer(ff, info.len_lin);
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// Check for wrapped part
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if (len < wNBytes)
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if (info.len_wrap)
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{
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// Get remaining wrapped length
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uint16_t len2 = tu_fifo_get_linear_write_info(ff, 0, &dst, wNBytes - len);
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TU_VERIFY(len2);
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// Update source pointer
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src += len;
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src += info.len_lin;
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// Since PMA is accessed 16-bit wise we need to handle the case when a 16 bit value was split
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if (len % 2) // If len is uneven there is a byte left to copy
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if (info.len_lin % 2) // If len is uneven there is a byte left to copy
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{
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TU_ASSERT(false); //TODO: step through -> untested
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uint32_t temp = pma[PMA_STRIDE*(src>>1)];
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*((uint8_t *)dst++) = ((temp >> 8) & 0xFF);
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*((uint8_t *)info.ptr_wrap++) = ((temp >> 8) & 0xFF);
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src++;
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len2--;
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tu_fifo_advance_write_pointer(ff, 1);
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info.len_wrap--;
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}
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TU_VERIFY(dcd_read_packet_memory(dst, src, len2));
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tu_fifo_advance_write_pointer(ff, len2);
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TU_VERIFY(dcd_read_packet_memory(info.ptr_wrap, src, info.len_wrap));
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tu_fifo_advance_write_pointer(ff, info.len_wrap);
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}
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return true;
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@@ -1158,5 +1172,3 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
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#endif
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#endif
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@@ -66,6 +66,7 @@
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defined(STM32F373xC)
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#include "stm32f3xx.h"
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#define PMA_LENGTH (512u)
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#define ISOCHRONOUS_DOUBLEBUFFER
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// NO internal Pull-ups
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// *B, and *C: 1 x 16 bits/word
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// PMA dedicated to USB (no sharing with CAN)
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@@ -75,6 +76,7 @@
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defined(STM32F303xD) || defined(STM32F303xE)
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#include "stm32f3xx.h"
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#define PMA_LENGTH (1024u)
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#define ISOCHRONOUS_DOUBLEBUFFER
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// NO internal Pull-ups
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// *6, *8, *D, and *E: 2 x 16 bits/word LPM Support
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// When CAN clock is enabled, USB can use first 768 bytes ONLY.
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