diff --git a/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmFunc.h b/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmFunc.h index e3d0edb8f..e1ed2666b 100644 --- a/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmFunc.h +++ b/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmFunc.h @@ -350,189 +350,16 @@ static __INLINE void __set_FPSCR(uint32_t fpscr) #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ /* IAR iccarm specific functions */ -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - -#pragma diag_suppress=Pe940 - -/** \brief Enable IRQ Interrupts - - This function enables IRQ interrupts by clearing the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __enable_irq __enable_interrupt +#include -/** \brief Disable IRQ Interrupts +#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ +/* TI CCS specific functions */ - This function disables IRQ interrupts by setting the I-bit in the CPSR. - Can only be executed in Privileged modes. - */ -#define __disable_irq __disable_interrupt +#include -/* intrinsic unsigned long __get_CONTROL( void ); (see intrinsic.h) */ -/* intrinsic void __set_CONTROL( unsigned long ); (see intrinsic.h) */ - - -/** \brief Get ISPR Register - - This function returns the content of the ISPR Register. - - \return ISPR Register value - */ -static uint32_t __get_IPSR(void) -{ - __ASM("mrs r0, ipsr"); -} - - -/** \brief Get APSR Register - - This function returns the content of the APSR Register. - - \return APSR Register value - */ -static uint32_t __get_APSR(void) -{ - __ASM("mrs r0, apsr"); -} - - -/** \brief Get xPSR Register - - This function returns the content of the xPSR Register. - - \return xPSR Register value - */ -static uint32_t __get_xPSR(void) -{ - __ASM("mrs r0, psr"); // assembler does not know "xpsr" -} - - -/** \brief Get Process Stack Pointer - - This function returns the current value of the Process Stack Pointer (PSP). - - \return PSP Register value - */ -static uint32_t __get_PSP(void) -{ - __ASM("mrs r0, psp"); -} - - -/** \brief Set Process Stack Pointer - - This function assigns the given value to the Process Stack Pointer (PSP). - - \param [in] topOfProcStack Process Stack Pointer value to set - */ -static void __set_PSP(uint32_t topOfProcStack) -{ - __ASM("msr psp, r0"); -} - - -/** \brief Get Main Stack Pointer - - This function returns the current value of the Main Stack Pointer (MSP). - - \return MSP Register value - */ -static uint32_t __get_MSP(void) -{ - __ASM("mrs r0, msp"); -} - - -/** \brief Set Main Stack Pointer - - This function assigns the given value to the Main Stack Pointer (MSP). - - \param [in] topOfMainStack Main Stack Pointer value to set - */ -static void __set_MSP(uint32_t topOfMainStack) -{ - __ASM("msr msp, r0"); -} - - -/* intrinsic unsigned long __get_PRIMASK( void ); (see intrinsic.h) */ -/* intrinsic void __set_PRIMASK( unsigned long ); (see intrinsic.h) */ - - -#if (__CORTEX_M >= 0x03) - -/** \brief Enable FIQ - - This function enables FIQ interrupts by clearing the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -static __INLINE void __enable_fault_irq(void) -{ - __ASM ("cpsie f"); -} - - -/** \brief Disable FIQ - - This function disables FIQ interrupts by setting the F-bit in the CPSR. - Can only be executed in Privileged modes. - */ -static __INLINE void __disable_fault_irq(void) -{ - __ASM ("cpsid f"); -} - - -/* intrinsic unsigned long __get_BASEPRI( void ); (see intrinsic.h) */ -/* intrinsic void __set_BASEPRI( unsigned long ); (see intrinsic.h) */ -/* intrinsic unsigned long __get_FAULTMASK( void ); (see intrinsic.h) */ -/* intrinsic void __set_FAULTMASK(unsigned long); (see intrinsic.h) */ - -#endif /* (__CORTEX_M >= 0x03) */ - - -#if (__CORTEX_M == 0x04) - -/** \brief Get FPSCR - - This function returns the current value of the Floating Point Status/Control register. - - \return Floating Point Status/Control register value - */ -static uint32_t __get_FPSCR(void) -{ -#if (__FPU_PRESENT == 1) - __ASM("vmrs r0, fpscr"); -#else - return(0); -#endif -} - - -/** \brief Set FPSCR - - This function assigns the given value to the Floating Point Status/Control register. - - \param [in] fpscr Floating Point Status/Control value to set - */ -static void __set_FPSCR(uint32_t fpscr) -{ -#if (__FPU_PRESENT == 1) - __ASM("vmsr fpscr, r0"); -#endif -} - -#endif /* (__CORTEX_M == 0x04) */ - -#pragma diag_default=Pe940 - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ +#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/ /* GNU gcc specific functions */ /** \brief Enable IRQ Interrupts diff --git a/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmInstr.h b/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmInstr.h index fb3c0927f..8cfafe418 100644 --- a/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmInstr.h +++ b/demos/bsp/lpc175x_6x/CMSISv2p00_LPC17xx/inc/core_cmInstr.h @@ -263,190 +263,13 @@ extern void __CLREX(void); #elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ /* IAR iccarm specific functions */ -#include /* IAR Intrinsics */ - -#pragma diag_suppress=Pe940 - -/** \brief No Operation - - No Operation does nothing. This instruction can be used for code alignment purposes. - */ -#define __NOP __no_operation +#include -/** \brief Wait For Interrupt - - Wait For Interrupt is a hint instruction that suspends execution - until one of a number of events occurs. - */ -static __INLINE void __WFI(void) -{ - __ASM ("wfi"); -} - - -/** \brief Wait For Event - - Wait For Event is a hint instruction that permits the processor to enter - a low-power state until one of a number of events occurs. - */ -static __INLINE void __WFE(void) -{ - __ASM ("wfe"); -} - - -/** \brief Send Event - - Send Event is a hint instruction. It causes an event to be signaled to the CPU. - */ -static __INLINE void __SEV(void) -{ - __ASM ("sev"); -} - - -/* intrinsic void __ISB(void) (see intrinsics.h) */ -/* intrinsic void __DSB(void) (see intrinsics.h) */ -/* intrinsic void __DMB(void) (see intrinsics.h) */ -/* intrinsic uint32_t __REV(uint32_t value) (see intrinsics.h) */ -/* intrinsic __SSAT (see intrinsics.h) */ -/* intrinsic __USAT (see intrinsics.h) */ - - -/** \brief Reverse byte order (16 bit) - - This function reverses the byte order in two unsigned short values. - - \param [in] value Value to reverse - \return Reversed value - */ -static uint32_t __REV16(uint32_t value) -{ - __ASM("rev16 r0, r0"); -} - - -/* intrinsic uint32_t __REVSH(uint32_t value) (see intrinsics.h */ - - -#if (__CORTEX_M >= 0x03) - -/** \brief Reverse bit order of value - - This function reverses the bit order of the given value. - - \param [in] value Value to reverse - \return Reversed value - */ -static uint32_t __RBIT(uint32_t value) -{ - __ASM("rbit r0, r0"); -} - - -/** \brief LDR Exclusive (8 bit) - - This function performs a exclusive LDR command for 8 bit value. - - \param [in] ptr Pointer to data - \return value of type uint8_t at (*ptr) - */ -static uint8_t __LDREXB(volatile uint8_t *addr) -{ - __ASM("ldrexb r0, [r0]"); -} - - -/** \brief LDR Exclusive (16 bit) - - This function performs a exclusive LDR command for 16 bit values. - - \param [in] ptr Pointer to data - \return value of type uint16_t at (*ptr) - */ -static uint16_t __LDREXH(volatile uint16_t *addr) -{ - __ASM("ldrexh r0, [r0]"); -} - - -/** \brief LDR Exclusive (32 bit) - - This function performs a exclusive LDR command for 32 bit values. - - \param [in] ptr Pointer to data - \return value of type uint32_t at (*ptr) - */ -/* intrinsic unsigned long __LDREX(unsigned long *) (see intrinsics.h) */ -static uint32_t __LDREXW(volatile uint32_t *addr) -{ - __ASM("ldrex r0, [r0]"); -} - - -/** \brief STR Exclusive (8 bit) - - This function performs a exclusive STR command for 8 bit values. - - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -static uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) -{ - __ASM("strexb r0, r0, [r1]"); -} - - -/** \brief STR Exclusive (16 bit) - - This function performs a exclusive STR command for 16 bit values. - - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -static uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) -{ - __ASM("strexh r0, r0, [r1]"); -} - - -/** \brief STR Exclusive (32 bit) - - This function performs a exclusive STR command for 32 bit values. - - \param [in] value Value to store - \param [in] ptr Pointer to location - \return 0 Function succeeded - \return 1 Function failed - */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long) (see intrinsics.h )*/ -static uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) -{ - __ASM("strex r0, r0, [r1]"); -} - - -/** \brief Remove the exclusive lock - - This function removes the exclusive lock which is created by LDREX. - - */ -static __INLINE void __CLREX(void) -{ - __ASM ("clrex"); -} - -/* intrinsic unsigned char __CLZ( unsigned long ) (see intrinsics.h) */ - -#endif /* (__CORTEX_M >= 0x03) */ - -#pragma diag_default=Pe940 +#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/ +/* TI CCS specific functions */ +#include #elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ diff --git a/demos/host/host_freertos/host_freertos.uvopt b/demos/host/host_freertos/host_freertos.uvopt index 3a74469c0..3c296ccf2 100644 --- a/demos/host/host_freertos/host_freertos.uvopt +++ b/demos/host/host_freertos/host_freertos.uvopt @@ -1042,10 +1042,10 @@ 1 0 0 - 2 + 0 0 - 2094 - 2109 + 2112 + 2115 0 ..\..\..\vendor\freertos\freertos\Source\tasks.c tasks.c @@ -1570,10 +1570,10 @@ 2 0 0 - 20 + 0 0 122 - 133 + 129 0 ..\..\bsp\lpc175x_6x\startup_keil\startup_LPC17xx.s startup_LPC17xx.s diff --git a/demos/host/host_os_none/host_os_none.ewd b/demos/host/host_os_none/host_os_none.ewd index 2d5807f83..c71220725 100644 --- a/demos/host/host_os_none/host_os_none.ewd +++ b/demos/host/host_os_none/host_os_none.ewd @@ -1,1304 +1,2601 @@ - - - - 2 - - Board EA4357 - - ARM - - 1 - - C-SPY - 2 - - 25 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ARMSIM_ID - 2 - - 1 - 1 - 1 - - - - - - - - ANGEL_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - - CMSISDAP_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - GDBSERVER_ID - 2 - - 0 - 1 - 1 - - - - - - - - - - - IARROM_ID - 2 - - 1 - 1 - 1 - - - - - - - - - IJET_ID - 2 - - 2 - 1 - 1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - JLINK_ID - 2 - - 15 - 1 - 1 - - - - - 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$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin + 1 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + + + diff --git a/demos/host/host_os_none/host_os_none.ewp b/demos/host/host_os_none/host_os_none.ewp index c0e587409..16d5f2b82 100644 --- a/demos/host/host_os_none/host_os_none.ewp +++ b/demos/host/host_os_none/host_os_none.ewp @@ -925,6 +925,929 @@ + + Board LPCXpresso1769 + + ARM + + 1 + + General + 3 + + 21 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 15 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + app @@ -945,9 +1868,6 @@ $PROJ_DIR$\..\src\msc_app.c - - $PROJ_DIR$\..\src\rndis_app.c - bsp @@ -962,6 +1882,9 @@ $PROJ_DIR$\..\..\bsp\boards\microbuilder\board_lpc4357usb.c + + $PROJ_DIR$\..\..\bsp\boards\lpcxpresso\board_lpcxpresso1769.c + $PROJ_DIR$\..\..\bsp\boards\ngx\board_ngx4330.c @@ -972,8 +1895,38 @@ $PROJ_DIR$\..\..\bsp\boards\printf_retarget.c + + lpc175x_6x + + Board EA4357 + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\CMSISv2p00_LPC17xx\src\core_cm3.c + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\LPC17xx_DriverLib\source\lpc17xx_clkpwr.c + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\LPC17xx_DriverLib\source\lpc17xx_gpio.c + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\LPC17xx_DriverLib\source\lpc17xx_pinsel.c + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\LPC17xx_DriverLib\source\lpc17xx_uart.c + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\startup_iar\startup_LPC17xx.s + + + $PROJ_DIR$\..\..\bsp\lpc175x_6x\CMSISv2p00_LPC17xx\src\system_LPC17xx.c + + lpc43xx + + Board LPCXpresso1769 + $PROJ_DIR$\..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_cgu.c @@ -1049,18 +2002,18 @@ host - - ehci - - $PROJ_DIR$\..\..\..\tinyusb\host\ehci\ehci.c - - + + $PROJ_DIR$\..\..\..\tinyusb\host\ehci\ehci.c + $PROJ_DIR$\..\..\..\tinyusb\host\hcd.c $PROJ_DIR$\..\..\..\tinyusb\host\hub.c + + $PROJ_DIR$\..\..\..\tinyusb\host\ohci\ohci.c + $PROJ_DIR$\..\..\..\tinyusb\host\usbh.c diff --git a/tinyusb/common/compiler/compiler_iar.h b/tinyusb/common/compiler/compiler_iar.h index 43062a1d8..cd94f5b2f 100644 --- a/tinyusb/common/compiler/compiler_iar.h +++ b/tinyusb/common/compiler/compiler_iar.h @@ -66,6 +66,7 @@ #define ATTR_ALIGNED_64 _Pragma("data_alignment=64") #define ATTR_ALIGNED_48 _Pragma("data_alignment=48") #define ATTR_ALIGNED_32 _Pragma("data_alignment=32") +#define ATTR_ALIGNED_16 _Pragma("data_alignment=16") #define ATTR_ALIGNED_4 _Pragma("data_alignment=4") #ifndef ATTR_ALWAYS_INLINE @@ -86,6 +87,9 @@ #define __be2n __REV #define __n2be __be2n +#define __n2be_16(u16) ((uint16_t) __REV16(u16)) +#define __be2n_16(u16) __n2be_16(u16) + #ifdef __cplusplus } #endif diff --git a/tinyusb/host/ehci/ehci.h b/tinyusb/host/ehci/ehci.h index ed4e8b0ef..1d7db7c95 100644 --- a/tinyusb/host/ehci/ehci.h +++ b/tinyusb/host/ehci/ehci.h @@ -152,6 +152,8 @@ typedef struct { uint32_t buffer[5]; } ehci_qtd_t; // XXX qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with ATTR_ALIGNED(32) +STATIC_ASSERT( sizeof(ehci_qtd_t) == 32, "size is not correct" ); + /// Queue Head (section 3.6) typedef struct { /// Word 0: Queue Head Horizontal Link Pointer @@ -202,6 +204,8 @@ typedef struct { ehci_qtd_t * volatile p_qtd_list_tail; // tail of the scheduled TD list } ehci_qhd_t; +STATIC_ASSERT( sizeof(ehci_qhd_t) == 64, "size is not correct" ); + /// Highspeed Isochronous Transfer Descriptor (section 3.3) typedef struct ATTR_ALIGNED(32) { /// Word 0: Next Link Pointer @@ -232,6 +236,8 @@ typedef struct ATTR_ALIGNED(32) { // uint32_t reserved[6]; } ehci_itd_t; +STATIC_ASSERT( sizeof(ehci_itd_t) == 64, "size is not correct" ); + /// Split (Full-Speed) Isochronous Transfer Descriptor typedef struct ATTR_ALIGNED(32) { /// Word 0: Next Link Pointer @@ -288,12 +294,14 @@ typedef struct ATTR_ALIGNED(32) { /*---------- Word 6 ----------*/ ehci_link_t back; - /// SITD is 32-byte aligned but occupies only 28 --> 6 bytes for storing extra data + /// SITD is 32-byte aligned but occupies only 28 --> 4 bytes for storing extra data uint8_t used; uint8_t ihd_idx; uint8_t reserved2[2]; } ehci_sitd_t; +STATIC_ASSERT( sizeof(ehci_sitd_t) == 32, "size is not correct" ); + //--------------------------------------------------------------------+ // EHCI Operational Register //--------------------------------------------------------------------+ diff --git a/tinyusb/host/ohci/ohci.c b/tinyusb/host/ohci/ohci.c index f55563535..8bcde4d21 100644 --- a/tinyusb/host/ohci/ohci.c +++ b/tinyusb/host/ohci/ohci.c @@ -320,7 +320,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t con p_status->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; //------------- Attach TDs list to Control Endpoint -------------// - p_ed->td_head = (uint32_t) p_setup; + p_ed->td_head.address = (uint32_t) p_setup; OHCI_REG->command_status_bit.control_list_filled = 1; @@ -450,13 +450,13 @@ static ohci_gtd_t * gtd_find_free(uint8_t dev_addr) static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd) { // tail is always NULL - if ( align16(p_ed->td_head) == 0 ) + if ( align16(p_ed->td_head.address) == 0 ) { // TD queue is empty --> head = TD - p_ed->td_head |= (uint32_t) p_gtd; + p_ed->td_head.address |= (uint32_t) p_gtd; } else { // TODO currently only support queue up to 2 TD each endpoint at a time - ((ohci_gtd_t*) align16(p_ed->td_head))->next_td = (uint32_t) p_gtd; + ((ohci_gtd_t*) align16(p_ed->td_head.address))->next_td = (uint32_t) p_gtd; } } @@ -513,19 +513,19 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) bool hcd_pipe_is_busy(pipe_handle_t pipe_hdl) { ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); - return align16(p_ed->td_head) != align16(p_ed->td_tail.address); + return align16(p_ed->td_head.address) != align16(p_ed->td_tail.address); } bool hcd_pipe_is_error(pipe_handle_t pipe_hdl) { ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); - return p_ed->halted; + return p_ed->td_head.halted; } bool hcd_pipe_is_stalled(pipe_handle_t pipe_hdl) { ohci_ed_t const * const p_ed = ed_from_pipe_handle(pipe_hdl); - return p_ed->halted && p_ed->is_stalled; + return p_ed->td_head.halted && p_ed->is_stalled; } uint8_t hcd_pipe_get_endpoint_addr(pipe_handle_t pipe_hdl) @@ -541,8 +541,8 @@ tusb_error_t hcd_pipe_clear_stall(pipe_handle_t pipe_hdl) p_ed->is_stalled = 0; p_ed->td_tail.address &= 0x0Ful; // set tail pointer back to NULL - p_ed->toggle = 0; // reset data toggle - p_ed->halted = 0; + p_ed->td_head.toggle = 0; // reset data toggle + p_ed->td_head.halted = 0; if ( TUSB_XFER_BULK == ed_get_xfer_type(p_ed) ) OHCI_REG->command_status_bit.bulk_list_filled = 1; @@ -630,7 +630,7 @@ static void done_queue_isr(uint8_t hostid) if ((event != TUSB_EVENT_XFER_COMPLETE)) { p_ed->td_tail.address &= 0x0Ful; - p_ed->td_tail.address |= align16(p_ed->td_head); // mark halted EP as empty queue + p_ed->td_tail.address |= align16(p_ed->td_head.address); // mark halted EP as empty queue if ( event == TUSB_EVENT_XFER_STALLED ) p_ed->is_stalled = 1; } diff --git a/tinyusb/host/ohci/ohci.h b/tinyusb/host/ohci/ohci.h index d830f4fe9..43875dcb3 100644 --- a/tinyusb/host/ohci/ohci.h +++ b/tinyusb/host/ohci/ohci.h @@ -87,7 +87,7 @@ typedef struct { }ohci_td_item_t; -typedef struct { +typedef struct ATTR_ALIGNED(16) { //------------- Word 0 -------------// uint32_t used : 1; uint32_t index : 4; // endpoint index the td belongs to, or device address in case of control xfer @@ -109,11 +109,11 @@ typedef struct { //------------- Word 3 -------------// uint8_t* buffer_end; -} ATTR_ALIGNED(16) ohci_gtd_t; +} ohci_gtd_t; STATIC_ASSERT( sizeof(ohci_gtd_t) == 16, "size is not correct" ); -typedef struct { +typedef struct ATTR_ALIGNED(16) { //------------- Word 0 -------------// uint32_t device_address : 7; uint32_t endpoint_number : 4; @@ -140,21 +140,21 @@ typedef struct { //------------- Word 2 -------------// volatile union { - uint32_t td_head; + uint32_t address; struct { uint32_t halted : 1; uint32_t toggle : 1; uint32_t : 30; }; - }; + }td_head; //------------- Word 3 -------------// uint32_t next_ed; // 4 lsb bits are free to use -} ATTR_ALIGNED(16) ohci_ed_t; +} ohci_ed_t; STATIC_ASSERT( sizeof(ohci_ed_t) == 16, "size is not correct" ); -typedef struct { +typedef struct ATTR_ALIGNED(32) { /*---------- Word 1 ----------*/ uint32_t starting_frame : 16; uint32_t : 5; // can be used @@ -175,12 +175,12 @@ typedef struct { /*---------- Word 5-8 ----------*/ volatile uint16_t offset_packetstatus[8]; -} ATTR_ALIGNED(32) ochi_itd_t; +} ochi_itd_t; STATIC_ASSERT( sizeof(ochi_itd_t) == 32, "size is not correct" ); // structure with member alignment required from large to small -typedef struct { +typedef struct ATTR_ALIGNED(256) { ohci_hcca_t hcca; ohci_ed_t bulk_head_ed; // static bulk head (dummy) @@ -198,7 +198,7 @@ typedef struct { ohci_gtd_t gtd[OHCI_MAX_QTD]; }device[TUSB_CFG_HOST_DEVICE_MAX]; -}ATTR_ALIGNED(256) ohci_data_t; +} ohci_data_t; //--------------------------------------------------------------------+ // OHCI Operational Register