这样修改之后stm32f429可以自动收到一个reset中断

This commit is contained in:
2025-09-20 14:38:45 +08:00
parent 8a1d7f9512
commit 6f4c32755b
3 changed files with 133 additions and 108 deletions

View File

@@ -79,8 +79,9 @@ extern "C" {
#define CFG_TUSB_DEBUG_PRINTF rt_kprintf
#endif /* CFG_TUSB_DEBUG */
// fs is 0; hs is 1
#ifndef BOARD_DEVICE_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM PKG_TINYUSB_RHPORT_NUM
#define BOARD_DEVICE_RHPORT_NUM 1
#endif
#ifndef BOARD_DEVICE_RHPORT_SPEED
@@ -213,7 +214,6 @@ extern "C" {
#define CFG_TUH_CDC_LINE_CODING_ON_ENUM {115200, CDC_LINE_CODING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8}
#ifdef __cplusplus
}
#endif

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@@ -26,6 +26,7 @@
#ifdef __RTTHREAD__
#include <rtthread.h>
#include "bsp_init.h"
#include "stm32f4xx.h"
#define DBG_TAG "TinyUSB"
#define DBG_LVL DBG_INFO
@@ -38,7 +39,23 @@ static rt_uint8_t tusb_stack[PKG_TINYUSB_STACK_SIZE];
static struct rt_thread tusb_thread;
#endif /* RT_USING_HEAP */
extern int tusb_board_init(void);
int tusb_board_init(void) {
GPIO_InitTypeDef GPIO_InitStructure;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_OTG_HS, ENABLE);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_OTG2_FS);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_OTG2_FS);
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14 | GPIO_Pin_15;
GPIO_Init(GPIOB, &GPIO_InitStructure);
// no need enable irq, it will be enabled in dwc2_dcd_int_enable()
return 0;
}
static void tusb_thread_entry(void *parameter)
{
@@ -58,7 +75,9 @@ static int init_tinyusb(void)
{
rt_thread_t tid;
// tusb_board_init();
tusb_board_init();
//call tusb_rhport_init()
tusb_init();
#ifdef RT_USING_HEAP

View File

@@ -48,11 +48,17 @@ extern "C" {
#elif CFG_TUSB_MCU == OPT_MCU_STM32F4
#include "stm32f4xx.h"
#define EP_MAX_FS 4
#define EP_FIFO_SIZE_FS 256
#define EP_MAX_FS 5
#define EP_FIFO_SIZE_FS 0x1000
#define EP_MAX_HS 4
#define EP_FIFO_SIZE_HS 256
#define EP_MAX_HS 5
#define EP_FIFO_SIZE_HS 0x1000
// #define USB_OTG_HS_BASE_ADDR 0x40040000
// #define USB_OTG_FS_BASE_ADDR 0x50000000
#define USB_OTG_HS_PERIPH_BASE 0x40040000
#define USB_OTG_FS_PERIPH_BASE 0x50000000
#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
#include "stm32h7xx.h"