support at32 mcu
This commit is contained in:
zhiqiang
154
hw/bsp/at32f402_405/boards/AT_START_F402_405/AT32F405xC_FLASH.ld
Normal file
154
hw/bsp/at32f402_405/boards/AT_START_F402_405/AT32F405xC_FLASH.ld
Normal file
@@ -0,0 +1,154 @@
|
||||
/*
|
||||
*****************************************************************************
|
||||
**
|
||||
** File : AT32F405xC_FLASH.ld
|
||||
**
|
||||
** Abstract : Linker script for AT32F405xC Device with
|
||||
** 256KByte FLASH, 102KByte RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used.
|
||||
**
|
||||
** Target : Artery Tek AT32
|
||||
**
|
||||
** Environment : Arm gcc toolchain
|
||||
**
|
||||
*****************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = 0x20019800; /* end of RAM */
|
||||
|
||||
/* Generate a link error if heap and stack don't fit into RAM */
|
||||
_Min_Heap_Size = 0x2000; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x4000; /* required amount of stack */
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 102K
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data goes into FLASH */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data goes into FLASH */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
|
||||
.ARM : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >FLASH
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH
|
||||
|
||||
/* used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections goes into RAM, load LMA copy after code */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
} >RAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough RAM left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
45983
hw/bsp/at32f402_405/boards/AT_START_F402_405/AT32F405xx_v2.svd
Normal file
45983
hw/bsp/at32f402_405/boards/AT_START_F402_405/AT32F405xx_v2.svd
Normal file
File diff suppressed because it is too large
Load Diff
169
hw/bsp/at32f402_405/boards/AT_START_F402_405/board.h
Normal file
169
hw/bsp/at32f402_405/boards/AT_START_F402_405/board.h
Normal file
@@ -0,0 +1,169 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020, Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H_
|
||||
#define BOARD_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define USB_VBUS_IGNORE
|
||||
//#define USB_SOF_OUTPUT_ENABLE
|
||||
|
||||
// LED
|
||||
#define LED_PORT GPIOF
|
||||
#define LED_PIN GPIO_PINS_4
|
||||
#define LED_STATE_ON 0 // Active Low
|
||||
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE)
|
||||
|
||||
// Button
|
||||
#define BUTTON_PORT GPIOA
|
||||
#define BUTTON_PIN GPIO_PINS_0
|
||||
#define BUTTON_STATE_ACTIVE 0
|
||||
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
|
||||
|
||||
//USART
|
||||
#define PRINT_UART USART1
|
||||
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
|
||||
#define PRINT_UART_TX_PIN GPIO_PINS_9
|
||||
#define PRINT_UART_TX_GPIO GPIOA
|
||||
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
|
||||
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
|
||||
|
||||
//USB
|
||||
#ifdef BOARD_TUD_RHPORT
|
||||
#if BOARD_TUD_RHPORT == 0
|
||||
#define USB_ID USB_OTG1_ID
|
||||
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
|
||||
#define OTG_IRQ OTGFS1_IRQn
|
||||
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
|
||||
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
|
||||
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
|
||||
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
|
||||
#define OTG_PIN_GPIO GPIOA
|
||||
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define OTG_PIN_VBUS GPIO_PINS_9
|
||||
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
|
||||
#define OTG_PIN_ID GPIO_PINS_10
|
||||
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
|
||||
#define OTG_PIN_SOF_GPIO GPIOA
|
||||
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define OTG_PIN_SOF GPIO_PINS_8
|
||||
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
|
||||
#define OTG_PIN_MUX GPIO_MUX_10
|
||||
#define USB_SPEED_CORE_ID USB_FULL_SPEED_CORE_ID
|
||||
#elif BOARD_TUD_RHPORT == 1
|
||||
#define USB_ID USB_OTG2_ID
|
||||
#define OTG_CLOCK CRM_OTGHS_PERIPH_CLOCK
|
||||
#define OTG_IRQ OTGHS_IRQn
|
||||
#define OTG_IRQ_HANDLER OTGHS_IRQHandler
|
||||
#define OTG_WKUP_IRQ OTGHS_WKUP_IRQn
|
||||
#define OTG_WKUP_HANDLER OTGHS_WKUP_IRQHandler
|
||||
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
|
||||
#define OTG_PIN_GPIO GPIOB
|
||||
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
|
||||
#define OTG_PIN_VBUS GPIO_PINS_13
|
||||
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
|
||||
#define OTG_PIN_ID GPIO_PINS_12
|
||||
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
|
||||
#define OTG_PIN_SOF_GPIO GPIOA
|
||||
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define OTG_PIN_SOF GPIO_PINS_4
|
||||
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
|
||||
#define OTG_PIN_MUX GPIO_MUX_10
|
||||
#define USB_SPEED_CORE_ID USB_HIGH_SPEED_CORE_ID
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BOARD_TUH_RHPORT
|
||||
#if BOARD_TUH_RHPORT == 0
|
||||
#define USB_ID USB_OTG1_ID
|
||||
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
|
||||
#define OTG_IRQ OTGFS1_IRQn
|
||||
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
|
||||
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
|
||||
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
|
||||
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
|
||||
#define OTG_PIN_GPIO GPIOA
|
||||
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define OTG_PIN_VBUS GPIO_PINS_9
|
||||
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
|
||||
#define OTG_PIN_ID GPIO_PINS_10
|
||||
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
|
||||
#define OTG_PIN_SOF_GPIO GPIOA
|
||||
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define OTG_PIN_SOF GPIO_PINS_8
|
||||
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
|
||||
#define OTG_PIN_MUX GPIO_MUX_10
|
||||
#define USB_SPEED_CORE_ID USB_FULL_SPEED_CORE_ID
|
||||
#elif BOARD_TUH_RHPORT == 1
|
||||
#define USB_ID USB_OTG2_ID
|
||||
#define OTG_CLOCK CRM_OTGHS_PERIPH_CLOCK
|
||||
#define OTG_IRQ OTGHS_IRQn
|
||||
#define OTG_IRQ_HANDLER OTGHS_IRQHandler
|
||||
#define OTG_WKUP_IRQ OTGHS_WKUP_IRQn
|
||||
#define OTG_WKUP_HANDLER OTGHS_WKUP_IRQHandler
|
||||
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
|
||||
#define OTG_PIN_GPIO GPIOB
|
||||
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
|
||||
#define OTG_PIN_VBUS GPIO_PINS_13
|
||||
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
|
||||
#define OTG_PIN_ID GPIO_PINS_12
|
||||
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
|
||||
#define OTG_PIN_SOF_GPIO GPIOA
|
||||
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
|
||||
#define OTG_PIN_SOF GPIO_PINS_4
|
||||
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
|
||||
#define OTG_PIN_MUX GPIO_MUX_10
|
||||
#define USB_SPEED_CORE_ID USB_HIGH_SPEED_CORE_ID
|
||||
#endif
|
||||
#endif
|
||||
|
||||
//Vbus
|
||||
static inline void board_vbus_sense_init(void)
|
||||
{
|
||||
#ifdef BOARD_TUD_RHPORT
|
||||
#if BOARD_TUD_RHPORT == 0
|
||||
*(int*)(0x50000038) |= (1<<21);
|
||||
#elif BOARD_TUD_RHPORT == 1
|
||||
*(int*)(0x40040038) |= (1<<21);
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BOARD_TUH_RHPORT
|
||||
#if BOARD_TUH_RHPORT == 0
|
||||
*(int*)(0x50000038) |= (1<<21);
|
||||
#elif BOARD_TUH_RHPORT == 1
|
||||
*(int*)(0x40040038) |= (1<<21);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* BOARD_H_ */
|
||||
4
hw/bsp/at32f402_405/boards/AT_START_F402_405/board.mk
Normal file
4
hw/bsp/at32f402_405/boards/AT_START_F402_405/board.mk
Normal file
@@ -0,0 +1,4 @@
|
||||
LD_FILE = $(BOARD_PATH)/AT32F405xC_FLASH.ld
|
||||
|
||||
CFLAGS += \
|
||||
-DAT32F405RCT7
|
||||
Reference in New Issue
Block a user