Test mode support only for Hi-Speed devices

This commit is contained in:
Rocky04
2024-01-15 16:45:58 +01:00
committed by GitHub
parent 78a1d4c482
commit 783a4f002b

View File

@@ -195,7 +195,6 @@
#elif TU_CHECK_MCU(OPT_MCU_STM32F7)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
#define TUP_USBIP_DWC2_TEST_MODE_SUPPORT
// FS has 6, HS has 9
#define TUP_DCD_ENDPOINT_MAX 9
@@ -203,6 +202,7 @@
// MCU with on-chip HS Phy
#if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx)
#define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
#define TUP_USBIP_DWC2_TEST_MODE_SUPPORT
#endif
#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
@@ -265,13 +265,13 @@
#elif TU_CHECK_MCU(OPT_MCU_STM32U5)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
#define TUP_USBIP_DWC2_TEST_MODE_SUPPORT
// U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY
#if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \
defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx)
#define TUP_DCD_ENDPOINT_MAX 9
#define TUP_RHPORT_HIGHSPEED 1
#define TUP_USBIP_DWC2_TEST_MODE_SUPPORT
#else
#define TUP_DCD_ENDPOINT_MAX 6
#endif