Merge branch 'master' into edpt_ISO_xfer
This commit is contained in:
@@ -48,23 +48,24 @@
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// Init these in dcd_init
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static uint8_t *next_buffer_ptr;
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// Endpoints 0-15, direction 0 for out and 1 for in.
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static struct hw_endpoint hw_endpoints[16][2] = {0};
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// USB_MAX_ENDPOINTS Endpoints, direction TUSB_DIR_OUT for out and TUSB_DIR_IN for in.
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static struct hw_endpoint hw_endpoints[USB_MAX_ENDPOINTS][2] = {0};
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static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, uint8_t in)
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static inline struct hw_endpoint *hw_endpoint_get_by_num(uint8_t num, tusb_dir_t dir)
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{
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return &hw_endpoints[num][in];
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return &hw_endpoints[num][dir];
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}
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static struct hw_endpoint *hw_endpoint_get_by_addr(uint8_t ep_addr)
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{
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uint8_t num = tu_edpt_number(ep_addr);
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uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
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return hw_endpoint_get_by_num(num, in);
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tusb_dir_t dir = tu_edpt_dir(ep_addr);
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return hw_endpoint_get_by_num(num, dir);
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}
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static void _hw_endpoint_alloc(struct hw_endpoint *ep)
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{
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uint size = TU_MIN(64, ep->wMaxPacketSize);
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uint16_t size = tu_min16(64, ep->wMaxPacketSize);
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// Assumes single buffered for now
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ep->hw_data_buf = next_buffer_ptr;
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@@ -99,15 +100,13 @@ static void _hw_endpoint_alloc(struct hw_endpoint *ep)
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*ep->endpoint_control = reg;
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}
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static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint wMaxPacketSize, uint8_t transfer_type)
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static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type)
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{
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uint8_t num = tu_edpt_number(ep_addr);
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bool in = ep_addr & TUSB_DIR_IN_MASK;
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const uint8_t num = tu_edpt_number(ep_addr);
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const tusb_dir_t dir = tu_edpt_dir(ep_addr);
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ep->ep_addr = ep_addr;
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ep->in = in;
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// For device, IN is a tx transfer and OUT is an rx transfer
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ep->rx = in == false;
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ep->num = num;
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ep->rx = (dir == TUSB_DIR_OUT);
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// Response to a setup packet on EP0 starts with pid of 1
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ep->next_pid = num == 0 ? 1u : 0u;
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@@ -131,7 +130,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint wMax
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ep->transfer_type = transfer_type;
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// Every endpoint has a buffer control register in dpram
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if (ep->in)
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if (dir == TUSB_DIR_IN)
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{
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ep->buffer_control = &usb_dpram->ep_buf_ctrl[num].in;
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}
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@@ -143,7 +142,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint wMax
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// Clear existing buffer control state
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*ep->buffer_control = 0;
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if (ep->num == 0)
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if (num == 0)
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{
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// EP0 has no endpoint control register because
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// the buffer offsets are fixed
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@@ -155,7 +154,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint wMax
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else
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{
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// Set the endpoint control register (starts at EP1, hence num-1)
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if (in)
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if (dir == TUSB_DIR_IN)
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{
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ep->endpoint_control = &usb_dpram->ep_ctrl[num-1].in;
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}
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@@ -194,7 +193,7 @@ static void hw_endpoint_close(uint8_t ep_addr)
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}
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#endif
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static void hw_endpoint_init(uint8_t ep_addr, uint wMaxPacketSize, uint8_t bmAttributes)
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static void hw_endpoint_init(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t bmAttributes)
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{
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struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
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_hw_endpoint_init(ep, ep_addr, wMaxPacketSize, bmAttributes);
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@@ -259,10 +258,10 @@ static void ep0_0len_status(void)
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static void _hw_endpoint_stall(struct hw_endpoint *ep)
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{
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assert(!ep->stalled);
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if (ep->num == 0)
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if (tu_edpt_number(ep->ep_addr) == 0)
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{
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// A stall on EP0 has to be armed so it can be cleared on the next setup packet
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usb_hw_set->ep_stall_arm = ep->in ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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usb_hw_set->ep_stall_arm = (tu_edpt_dir(ep->ep_addr) == TUSB_DIR_IN) ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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}
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_hw_endpoint_buffer_control_set_mask32(ep, USB_BUF_CTRL_STALL);
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ep->stalled = true;
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@@ -276,10 +275,10 @@ static void hw_endpoint_stall(uint8_t ep_addr)
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static void _hw_endpoint_clear_stall(struct hw_endpoint *ep)
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{
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if (ep->num == 0)
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if (tu_edpt_number(ep->ep_addr) == 0)
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{
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// Probably already been cleared but no harm
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usb_hw_clear->ep_stall_arm = ep->in ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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usb_hw_clear->ep_stall_arm = (tu_edpt_dir(ep->ep_addr) == TUSB_DIR_IN) ? USB_EP_STALL_ARM_EP0_IN_BITS : USB_EP_STALL_ARM_EP0_OUT_BITS;
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}
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_hw_endpoint_buffer_control_clear_mask32(ep, USB_BUF_CTRL_STALL);
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ep->stalled = false;
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@@ -313,18 +312,67 @@ static void dcd_rp2040_irq(void)
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hw_handle_buff_status();
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}
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// SE0 for 2 us or more, usually together with Bus Reset
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if (status & USB_INTS_DEV_CONN_DIS_BITS)
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{
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handled |= USB_INTS_DEV_CONN_DIS_BITS;
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if ( usb_hw->sie_status & USB_SIE_STATUS_CONNECTED_BITS )
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{
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// Connected: nothing to do
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}else
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{
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// Disconnected
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dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
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}
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usb_hw_clear->sie_status = USB_SIE_STATUS_CONNECTED_BITS;
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}
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// SE0 for 2.5 us or more
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if (status & USB_INTS_BUS_RESET_BITS)
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{
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pico_trace("BUS RESET (addr %d -> %d)\n", assigned_address, 0);
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pico_trace("BUS RESET\n");
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usb_hw->dev_addr_ctrl = 0;
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handled |= USB_INTS_BUS_RESET_BITS;
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
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usb_hw_clear->sie_status = USB_SIE_STATUS_BUS_RESET_BITS;
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#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
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rp2040_usb_device_enumeration_fix();
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// Only run enumeration walk-around if pull up is enabled
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if ( usb_hw->sie_ctrl & USB_SIE_CTRL_PULLUP_EN_BITS )
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{
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rp2040_usb_device_enumeration_fix();
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}
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#endif
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}
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#if 0
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// TODO Enable SUSPEND & RESUME interrupt and test later on with/without VBUS detection
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/* Note from pico datasheet 4.1.2.6.4 (v1.2)
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* If you enable the suspend interrupt, it is likely you will see a suspend interrupt when
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* the device is first connected but the bus is idle. The bus can be idle for a few ms before
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* the host begins sending start of frame packets. You will also see a suspend interrupt
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* when the device is disconnected if you do not have a VBUS detect circuit connected. This is
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* because without VBUS detection, it is impossible to tell the difference between
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* being disconnected and suspended.
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*/
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if (status & USB_INTS_DEV_SUSPEND_BITS)
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{
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handled |= USB_INTS_DEV_SUSPEND_BITS;
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dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
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usb_hw_clear->sie_status = USB_SIE_STATUS_SUSPENDED_BITS;
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}
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if (status & USB_INTS_DEV_RESUME_FROM_HOST_BITS)
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{
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handled |= USB_INTS_DEV_RESUME_FROM_HOST_BITS;
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dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
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usb_hw_clear->sie_status = USB_SIE_STATUS_RESUME_BITS;
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}
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#endif
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if (status ^ handled)
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{
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panic("Unhandled IRQ 0x%x\n", (uint) (status ^ handled));
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@@ -365,8 +413,10 @@ void dcd_init (uint8_t rhport)
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// Enable individual controller IRQS here. Processor interrupt enable will be used
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// for the global interrupt enable...
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// TODO Enable SUSPEND & RESUME interrupt
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usb_hw->sie_ctrl = USB_SIE_CTRL_EP0_INT_1BUF_BITS;
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usb_hw->inte = USB_INTS_BUFF_STATUS_BITS | USB_INTS_BUS_RESET_BITS | USB_INTS_SETUP_REQ_BITS;
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usb_hw->inte = USB_INTS_BUFF_STATUS_BITS | USB_INTS_BUS_RESET_BITS | USB_INTS_SETUP_REQ_BITS |
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USB_INTS_DEV_CONN_DIS_BITS /* | USB_INTS_DEV_SUSPEND_BITS | USB_INTS_DEV_RESUME_FROM_HOST_BITS */ ;
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dcd_connect(rhport);
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}
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@@ -394,8 +444,9 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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void dcd_remote_wakeup(uint8_t rhport)
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{
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pico_info("dcd_remote_wakeup %d is not supported yet\n", rhport);
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pico_info("dcd_remote_wakeup %d\n", rhport);
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assert(rhport == 0);
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usb_hw_set->sie_ctrl = USB_SIE_CTRL_RESUME_BITS;
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}
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// disconnect by disabling internal pull-up resistor on D+/D-
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@@ -291,14 +291,16 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
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assert(ep->buffer_control);
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assert(ep->hw_data_buf);
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uint8_t num = tu_edpt_number(ep_addr);
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uint8_t const num = tu_edpt_number(ep_addr);
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tusb_dir_t const dir = tu_edpt_dir(ep_addr);
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bool in = ep_addr & TUSB_DIR_IN_MASK;
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ep->ep_addr = ep_addr;
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ep->dev_addr = dev_addr;
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ep->in = in;
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// For host, IN to host == RX, anything else rx == false
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ep->rx = in == true;
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ep->num = num;
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ep->rx = (dir == TUSB_DIR_IN);
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// Response to a setup packet on EP0 starts with pid of 1
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ep->next_pid = num == 0 ? 1u : 0u;
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ep->wMaxPacketSize = wMaxPacketSize;
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@@ -327,9 +329,9 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
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// device address
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// endpoint number / direction
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// preamble
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uint32_t reg = dev_addr | (ep->num << USB_ADDR_ENDP1_ENDPOINT_LSB);
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uint32_t reg = dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB);
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// Assert the interrupt endpoint is IN_TO_HOST
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assert(ep->in);
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assert(dir == TUSB_DIR_IN);
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if (need_pre(dev_addr))
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{
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@@ -363,9 +365,10 @@ static void hw_endpoint_init(uint8_t dev_addr, const tusb_desc_endpoint_t *ep_de
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//--------------------------------------------------------------------+
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// HCD API
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//--------------------------------------------------------------------+
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bool hcd_init(void)
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bool hcd_init(uint8_t rhport)
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{
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pico_trace("hcd_init\n");
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pico_trace("hcd_init %d\n", rhport);
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assert(rhport == 0);
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// Reset any previous state
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rp2040_usb_init();
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@@ -461,7 +464,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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if (ep == &epx) {
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// That has set up buffer control, endpoint control etc
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// for host we have to initiate the transfer
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usb_hw->dev_addr_ctrl = dev_addr | ep->num << USB_ADDR_ENDP_ENDPOINT_LSB;
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usb_hw->dev_addr_ctrl = dev_addr | (tu_edpt_number(ep_addr) << USB_ADDR_ENDP_ENDPOINT_LSB);
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uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | sie_ctrl_base;
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flags |= ep->rx ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS;
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// Set pre if we are a low speed device on full speed hub
|
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@@ -30,7 +30,6 @@
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#include <stdlib.h>
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#include "rp2040_usb.h"
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#include "hardware/clocks.h"
|
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|
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// Direction strings for debug
|
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const char *ep_dir_string[] = {
|
||||
@@ -44,10 +43,12 @@ static inline void _hw_endpoint_lock_update(struct hw_endpoint *ep, int delta) {
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||||
// sense to have worker and IRQ on same core, however I think using critsec is about equivalent.
|
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}
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
static inline void _hw_endpoint_update_last_buf(struct hw_endpoint *ep)
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{
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ep->last_buf = ep->len + ep->transfer_size == ep->total_len;
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}
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||||
#endif
|
||||
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void rp2040_usb_init(void)
|
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{
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||||
@@ -59,8 +60,11 @@ void rp2040_usb_init(void)
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memset(usb_hw, 0, sizeof(*usb_hw));
|
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memset(usb_dpram, 0, sizeof(*usb_dpram));
|
||||
|
||||
// Mux to phy
|
||||
// Mux the controller to the onboard usb phy
|
||||
usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
|
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|
||||
// Force VBUS detect so the device thinks it is plugged into a host
|
||||
// TODO support VBUs detect
|
||||
usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
|
||||
}
|
||||
|
||||
@@ -68,7 +72,9 @@ void hw_endpoint_reset_transfer(struct hw_endpoint *ep)
|
||||
{
|
||||
ep->stalled = false;
|
||||
ep->active = false;
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
ep->sent_setup = false;
|
||||
#endif
|
||||
ep->total_len = 0;
|
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ep->len = 0;
|
||||
ep->transfer_size = 0;
|
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@@ -84,12 +90,12 @@ void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_m
|
||||
value |= or_mask;
|
||||
if (or_mask & USB_BUF_CTRL_AVAIL) {
|
||||
if (*ep->buffer_control & USB_BUF_CTRL_AVAIL) {
|
||||
panic("ep %d %s was already available", ep->num, ep_dir_string[ep->in]);
|
||||
panic("ep %d %s was already available", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
}
|
||||
*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL;
|
||||
// 12 cycle delay.. (should be good for 48*12Mhz = 576Mhz)
|
||||
// Don't need delay in host mode as host is in charge
|
||||
#ifndef RP2040_USB_HOST_MODE
|
||||
#if !TUSB_OPT_HOST_ENABLED
|
||||
__asm volatile (
|
||||
"b 1f\n"
|
||||
"1: b 1f\n"
|
||||
@@ -122,6 +128,7 @@ void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
|
||||
val |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
|
||||
ep->next_pid ^= 1u;
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Is this the last buffer? Only really matters for host mode. Will trigger
|
||||
// the trans complete irq but also stop it polling. We only really care about
|
||||
// trans complete for setup packets being sent
|
||||
@@ -130,6 +137,7 @@ void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
|
||||
pico_trace("Last buf (%d bytes left)\n", ep->transfer_size);
|
||||
val |= USB_BUF_CTRL_LAST;
|
||||
}
|
||||
#endif
|
||||
|
||||
// Finally, write to buffer_control which will trigger the transfer
|
||||
// the next time the controller polls this dpram address
|
||||
@@ -141,11 +149,11 @@ void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
|
||||
void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len)
|
||||
{
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
pico_trace("Start transfer of total len %d on ep %d %s\n", total_len, ep->num, ep_dir_string[ep->in]);
|
||||
pico_trace("Start transfer of total len %d on ep %d %s\n", total_len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
if (ep->active)
|
||||
{
|
||||
// TODO: Is this acceptable for interrupt packets?
|
||||
pico_warn("WARN: starting new transfer on already active ep %d %s\n", ep->num, ep_dir_string[ep->in]);
|
||||
pico_warn("WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
}
|
||||
@@ -153,12 +161,14 @@ void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t t
|
||||
// Fill in info now that we're kicking off the hw
|
||||
ep->total_len = total_len;
|
||||
ep->len = 0;
|
||||
ep->transfer_size = tu_min32(total_len, ep->wMaxPacketSize);
|
||||
ep->transfer_size = tu_min16(total_len, ep->wMaxPacketSize);
|
||||
ep->active = true;
|
||||
ep->user_buf = buffer;
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Recalculate if this is the last buffer
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
ep->buf_sel = 0;
|
||||
#endif
|
||||
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
@@ -172,9 +182,9 @@ void _hw_endpoint_xfer_sync(struct hw_endpoint *ep)
|
||||
// Get the buffer state and amount of bytes we have
|
||||
// transferred
|
||||
uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
uint transferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
uint16_t transferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
|
||||
#ifdef RP2040_USB_HOST_MODE
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// tag::host_buf_sel_fix[]
|
||||
if (ep->buf_sel == 1)
|
||||
{
|
||||
@@ -223,16 +233,18 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
// Part way through a transfer
|
||||
if (!ep->active)
|
||||
{
|
||||
panic("Can't continue xfer on inactive ep %d %s", ep->num, ep_dir_string);
|
||||
panic("Can't continue xfer on inactive ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string);
|
||||
}
|
||||
|
||||
// Update EP struct from hardware state
|
||||
_hw_endpoint_xfer_sync(ep);
|
||||
|
||||
// Now we have synced our state with the hardware. Is there more data to transfer?
|
||||
uint remaining_bytes = ep->total_len - ep->len;
|
||||
ep->transfer_size = tu_min32(remaining_bytes, ep->wMaxPacketSize);
|
||||
uint16_t remaining_bytes = ep->total_len - ep->len;
|
||||
ep->transfer_size = tu_min16(remaining_bytes, ep->wMaxPacketSize);
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
#endif
|
||||
|
||||
// Can happen because of programmer error so check for it
|
||||
if (ep->len > ep->total_len)
|
||||
@@ -244,7 +256,7 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
if (ep->len == ep->total_len)
|
||||
{
|
||||
pico_trace("Completed transfer of %d bytes on ep %d %s\n",
|
||||
ep->len, ep->num, ep_dir_string[ep->in]);
|
||||
ep->len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
// Notify caller we are done so it can notify the tinyusb
|
||||
// stack
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
@@ -263,7 +275,7 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start)
|
||||
{
|
||||
// Trace
|
||||
pico_trace("hw_endpoint_xfer ep %d %s", ep->num, ep_dir_string[ep->in]);
|
||||
pico_trace("hw_endpoint_xfer ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
pico_trace(" total_len %d, start=%d\n", total_len, start);
|
||||
|
||||
assert(ep->configured);
|
||||
|
||||
@@ -42,10 +42,6 @@ struct hw_endpoint
|
||||
{
|
||||
// Is this a valid struct
|
||||
bool configured;
|
||||
// EP direction
|
||||
bool in;
|
||||
// EP num (not including direction)
|
||||
uint8_t num;
|
||||
|
||||
// Transfer direction (i.e. IN is rx for host but tx for device)
|
||||
// allows us to common up transfer functions
|
||||
@@ -67,28 +63,30 @@ struct hw_endpoint
|
||||
|
||||
// Current transfer information
|
||||
bool active;
|
||||
uint total_len;
|
||||
uint len;
|
||||
uint16_t total_len;
|
||||
uint16_t len;
|
||||
// Amount of data with the hardware
|
||||
uint transfer_size;
|
||||
uint16_t transfer_size;
|
||||
// User buffer in main memory
|
||||
uint8_t *user_buf;
|
||||
|
||||
// Data needed from EP descriptor
|
||||
uint16_t wMaxPacketSize;
|
||||
// Interrupt, bulk, etc
|
||||
uint8_t transfer_type;
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Only needed for host mode
|
||||
bool last_buf;
|
||||
// HOST BUG. Host will incorrect write status to top half of buffer
|
||||
// control register when doing transfers > 1 packet
|
||||
uint8_t buf_sel;
|
||||
// User buffer in main memory
|
||||
uint8_t *user_buf;
|
||||
|
||||
// Data needed from EP descriptor
|
||||
uint wMaxPacketSize;
|
||||
// Interrupt, bulk, etc
|
||||
uint8_t transfer_type;
|
||||
|
||||
// Only needed for host
|
||||
uint8_t dev_addr;
|
||||
bool sent_setup;
|
||||
// If interrupt endpoint
|
||||
uint8_t interrupt_num;
|
||||
#endif
|
||||
};
|
||||
|
||||
void rp2040_usb_init(void);
|
||||
|
||||
Reference in New Issue
Block a user