rename to fsdev_type.h, use FSDDEV_REG instead of USB
This commit is contained in:
@@ -123,7 +123,7 @@
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#error "Unknown USB IP"
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#endif
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#include "fsdev_common.h"
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#include "fsdev_type.h"
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//--------------------------------------------------------------------+
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// Configuration
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@@ -197,25 +197,25 @@ void dcd_init(uint8_t rhport) {
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}
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// Perform USB peripheral reset
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USB->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
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FSDEV_REG->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
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for (volatile uint32_t i = 0; i < 200; i++) { // should be a few us
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asm("NOP");
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}
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USB->CNTR &= ~USB_CNTR_PDWN;
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FSDEV_REG->CNTR &= ~USB_CNTR_PDWN;
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// Wait startup time, for F042 and F070, this is <= 1 us.
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for (volatile uint32_t i = 0; i < 200; i++) { // should be a few us
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asm("NOP");
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}
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USB->CNTR = 0; // Enable USB
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FSDEV_REG->CNTR = 0; // Enable USB
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#if !defined(STM32G0) && !defined(STM32H5) && !defined(STM32U5)
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// BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
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USB->BTABLE = FSDEV_BTABLE_BASE;
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#if !defined(FSDEV_BUS_32BIT)
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// BTABLE register does not exist any more on 32-bit bus devices
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FSDEV_REG->BTABLE = FSDEV_BTABLE_BASE;
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#endif
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USB->ISTR = 0; // Clear pending interrupts
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FSDEV_REG->ISTR = 0; // Clear pending interrupts
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// Reset endpoints to disabled
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for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
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@@ -223,7 +223,7 @@ void dcd_init(uint8_t rhport) {
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ep_write(i, 0u);
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}
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USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
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FSDEV_REG->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
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handle_bus_reset(rhport);
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// Enable pull-up if supported
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@@ -234,9 +234,9 @@ void dcd_sof_enable(uint8_t rhport, bool en) {
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(void)rhport;
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if (en) {
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USB->CNTR |= USB_CNTR_SOFM;
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FSDEV_REG->CNTR |= USB_CNTR_SOFM;
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} else {
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USB->CNTR &= ~USB_CNTR_SOFM;
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FSDEV_REG->CNTR &= ~USB_CNTR_SOFM;
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}
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}
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@@ -254,12 +254,12 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
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void dcd_remote_wakeup(uint8_t rhport) {
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(void)rhport;
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USB->CNTR |= USB_CNTR_RESUME;
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FSDEV_REG->CNTR |= USB_CNTR_RESUME;
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remoteWakeCountdown = 4u; // required to be 1 to 15 ms, ESOF should trigger every 1ms.
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}
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static void handle_bus_reset(uint8_t rhport) {
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USB->DADDR = 0u; // disable USB Function
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FSDEV_REG->DADDR = 0u; // disable USB Function
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for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
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// Clear EP allocation status
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@@ -274,7 +274,7 @@ static void handle_bus_reset(uint8_t rhport) {
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edpt0_open(rhport); // open control endpoint (both IN & OUT)
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USB->DADDR = USB_DADDR_EF; // Enable USB Function
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FSDEV_REG->DADDR = USB_DADDR_EF; // Enable USB Function
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}
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// Handle CTR interrupt for the TX/IN direction
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@@ -410,7 +410,7 @@ static void handle_ctr_rx(uint32_t ep_id) {
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}
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void dcd_int_handler(uint8_t rhport) {
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uint32_t int_status = USB->ISTR;
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uint32_t int_status = FSDEV_REG->ISTR;
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// const uint32_t handled_ints = USB_ISTR_CTR | USB_ISTR_RESET | USB_ISTR_WKUP
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// | USB_ISTR_SUSP | USB_ISTR_SOF | USB_ISTR_ESOF;
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// unused IRQs: (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_L1REQ )
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@@ -421,23 +421,23 @@ void dcd_int_handler(uint8_t rhport) {
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/* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
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if (int_status & USB_ISTR_SOF) {
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
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dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
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FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
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dcd_event_sof(0, FSDEV_REG->FNR & USB_FNR_FN, true);
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}
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if (int_status & USB_ISTR_RESET) {
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// USBRST is start of reset.
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
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FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
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handle_bus_reset(rhport);
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dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
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return; // Don't do the rest of the things here; perhaps they've been cleared?
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}
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if (int_status & USB_ISTR_WKUP) {
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USB->CNTR &= ~USB_CNTR_LPMODE;
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USB->CNTR &= ~USB_CNTR_FSUSP;
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FSDEV_REG->CNTR &= ~USB_CNTR_LPMODE;
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FSDEV_REG->CNTR &= ~USB_CNTR_FSUSP;
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_WKUP;
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FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_WKUP;
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dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
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}
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@@ -446,22 +446,22 @@ void dcd_int_handler(uint8_t rhport) {
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* these events cannot be differentiated, so we only trigger suspend. */
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/* Force low-power mode in the macrocell */
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USB->CNTR |= USB_CNTR_FSUSP;
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USB->CNTR |= USB_CNTR_LPMODE;
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FSDEV_REG->CNTR |= USB_CNTR_FSUSP;
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FSDEV_REG->CNTR |= USB_CNTR_LPMODE;
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/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_SUSP;
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FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_SUSP;
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dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
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}
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if (int_status & USB_ISTR_ESOF) {
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if (remoteWakeCountdown == 1u) {
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USB->CNTR &= ~USB_CNTR_RESUME;
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FSDEV_REG->CNTR &= ~USB_CNTR_RESUME;
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}
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if (remoteWakeCountdown > 0u) {
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remoteWakeCountdown--;
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}
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
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FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
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}
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// loop to handle all pending CTR interrupts
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@@ -474,7 +474,7 @@ void dcd_int_handler(uint8_t rhport) {
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handle_ctr_rx(ep_id); // RX/OUT or both (RX/TX !!)
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}
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int_status = USB->ISTR;
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int_status = FSDEV_REG->ISTR;
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}
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}
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@@ -488,10 +488,11 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const *req
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(void)rhport;
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if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
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request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
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request->bRequest == TUSB_REQ_SET_ADDRESS) {
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uint8_t const dev_addr = (uint8_t)request->wValue;
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USB->DADDR = (USB_DADDR_EF | dev_addr);
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FSDEV_REG->DADDR = (USB_DADDR_EF | dev_addr);
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}
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}
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