add Nuvoton NUC505

hw/bsp/nutiny_sdk_nuc505/board.mk

@@ -0,0 +1,52 @@
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs-linux \
+  -mcpu=cortex-m4 \
+  -DCFG_TUSB_MCU=OPT_MCU_NUC505
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld
+
+SRC_C += \
+  hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Source/system_NUC505Series.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/adc.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/clk.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/gpio.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/i2c.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/i2s.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/pwm.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/rtc.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/sd.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/spi.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/spim.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/sys.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/timer.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/uart.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/usbd.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/wdt.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/wwdt.c
+
+SRC_S += \
+  hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Source/GCC/startup_NUC505Series.S
+
+INC += \
+  $(TOP)/hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Include \
+  $(TOP)/hw/mcu/nuvoton/nuc505/StdDriver/inc \
+  $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include
+
+# For TinyUSB port source
+VENDOR = nuvoton
+CHIP_FAMILY = nuc505
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM4
+
+# For flash-jlink target
+JLINK_DEVICE = NUC505YO13Y
+JLINK_IF = swd
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+flash: $(BUILD)/$(BOARD)-firmware.elf
+	openocd -f interface/nulink.cfg -f target/numicroM4.cfg -c "program $< reset exit"

hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld

@@ -0,0 +1,199 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000   /* 512k */
+  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x20000   /* 128k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.startup :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		KEEP(*(.preinit))
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+
+		*(.text*)
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}

hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c

@@ -0,0 +1,115 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board.h"
+#include "NUC505Series.h"
+
+#define LED_PORT     PC
+#define LED_PIN      3
+#define LED_STATE_ON 0
+
+void board_init(void)
+{
+  /* Enable XTAL */
+  CLK->PWRCTL |= CLK_PWRCTL_HXTEN_Msk;
+
+  CLK_SetCoreClock(96000000);
+
+  /* Set PCLK divider */
+  CLK_SetModuleClock(PCLK_MODULE, 0, 1);
+
+  /* Update System Core Clock */
+  SystemCoreClockUpdate();
+
+  /* Enable USB IP clock */
+  CLK_EnableModuleClock(USBD_MODULE);
+
+  /* Select USB IP clock source */
+  CLK_SetModuleClock(USBD_MODULE, CLK_USBD_SRC_EXT, 0);
+
+  CLK_SetModuleClock(PCLK_MODULE, 0, 1);
+
+  /* Enable PHY */
+  USBD_ENABLE_PHY();
+  /* wait PHY clock ready */
+  while (1) {
+      USBD->EP[EPA].EPMPS = 0x20;
+      if (USBD->EP[EPA].EPMPS == 0x20)
+          break;
+  }
+
+  /* Force SE0, and then clear it to connect*/
+  USBD_SET_SE0();
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(96000000 / 1000);
+#endif
+
+  GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_MODE_OUTPUT);
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  uint32_t current = (state) ? LED_STATE_ON : (1-LED_STATE_ON);
+  current <<= LED_PIN;
+  current |= LED_PORT->DOUT & ~(1UL << LED_PIN);
+  LED_PORT->DOUT = current;
+}
+
+uint32_t board_button_read(void)
+{
+  return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}