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make nanolib linking explicitly by each family/board

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hathach
2023-11-23 12:43:13 +07:00
parent 1a98f5389c
commit 82880eecbd
58 changed files with 130 additions and 684 deletions
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hw/bsp/ra/family.mk
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@@ -31,6 +31,8 @@ else
$(info "Using PORT 0 FullSpeed")
endif
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
SRC_C += \
src/portable/renesas/rusb2/dcd_rusb2.c \
src/portable/renesas/rusb2/hcd_rusb2.c \