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Merge pull request #3236 from ning3270455369/master

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modified the bsp files of at32 to make them work better
This commit is contained in:
Ha Thach
2025-09-05 10:35:02 +07:00
committed by GitHub
parent 89f8fbc9c2 a379efcbf5
commit 8304587d77
27 changed files with 387 additions and 292 deletions
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26
docs/reference/boards.rst
View File

@@ -30,18 +30,20 @@ max78002evkit MAX78002 EVKIT maxim https://www.analog.com/en/resources/e
Artery Artery
----- -----
========================= ==================================== ============= ==================================================== ====== ============== ============== ============= ================================================== ======
Board Name Family URL Note Board Name Family URL Note
========================= ==================================== ============= ==================================================== ====== ============== ============== ============= ================================================== ======
at_start_f405 AT-START-F405 at32f402_405 https://www.arterychip.com/en/product/AT32F405.jsp at_start_f402 AT-START-F402 at32f402_405 https://www.arterychip.com/en/product/AT32F402.jsp
at_start_f403a AT-START-F403a at32f403a_407 https://www.arterychip.com/en/product/AT32F403.jsp at_start_f405 AT-START-F405 at32f402_405 https://www.arterychip.com/en/product/AT32F405.jsp
at32f403a_weact_blackpill WeAct Studio BlackPill AT32F403ACGU7 at32f403a_407 https://github.com/WeActStudio/WeActStudio.BlackPill at_start_f403a AT-START-F403a at32f403a_407 https://www.arterychip.com/en/product/AT32F403A.jsp
at_start_f413 AT-START-F413 at32f413 https://www.arterychip.com/en/product/AT32F413.jsp at_start_f407 AT-START-F407 at32f403a_407 https://www.arterychip.com/en/product/AT32F407.jsp
at_start_f415 AT-START-F415 at32f415 https://www.arterychip.com/en/product/AT32F415.jsp at_start_f413 AT-START-F413 at32f413 https://www.arterychip.com/en/product/AT32F413.jsp
at_start_f423 AT-START-F423 at32f423 https://www.arterychip.com/en/product/AT32F423.jsp at_start_f415 AT-START-F415 at32f415 https://www.arterychip.com/en/product/AT32F415.jsp
at_start_f425 AT-START-F425 at32f425 https://www.arterychip.com/en/product/AT32F425.jsp at_start_f423 AT-START-F423 at32f423 https://www.arterychip.com/en/product/AT32F423.jsp
at_start_f437 AT-START-F437 at32f435_437 https://www.arterychip.com/en/product/AT32F437.jsp at_start_f425 AT-START-F425 at32f425 https://www.arterychip.com/en/product/AT32F425.jsp
========================= ==================================== ============= ==================================================== ====== at_start_f435 AT-START-F435 at32f435_437 https://www.arterychip.com/en/product/AT32F435.jsp
at_start_f437 AT-START-F437 at32f435_437 https://www.arterychip.com/en/product/AT32F437.jsp
============== ============== ============= ================================================== ======
Bridgetek Bridgetek
--------- ---------

8
hw/bsp/at32f402_405/boards/at_start_f402/board.cmake Normal file
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@@ -0,0 +1,8 @@
set(MCU_VARIANT AT32F402RCT7)
set(MCU_LINKER_NAME AT32F402xC)
set(JLINK_DEVICE ${MCU_VARIANT})
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()

74
hw/bsp/at32f402_405/boards/at_start_f402/board.h Normal file
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@@ -0,0 +1,74 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: AT-START-F405
url: https://www.arterychip.com/en/product/AT32F405.jsp
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define USB_VBUS_IGNORE
//#define USB_SOF_OUTPUT_ENABLE
// LED
#define LED_PORT GPIOF
#define LED_PIN GPIO_PINS_4
#define LED_STATE_ON 0 // Active Low
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOF_PERIPH_CLOCK, TRUE)
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
//USART
#define PRINT_UART USART1
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
#define PRINT_UART_TX_PIN GPIO_PINS_9
#define PRINT_UART_TX_GPIO GPIOA
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
//Vbus
static inline void board_vbus_sense_init(void)
{
*(int*)(0x50000038) |= (1<<21);
*(int*)(0x40040038) |= (1<<21);
}
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

7
hw/bsp/at32f402_405/boards/at_start_f402/board.mk Normal file
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@@ -0,0 +1,7 @@
MCU_VARIANT = AT32F402RCT7
MCU_LINKER_NAME = AT32F402xC
JLINK_DEVICE = ${MCU_VARIANT}
CFLAGS += \
-D${MCU_VARIANT}

9
hw/bsp/at32f402_405/boards/at_start_f405/board.cmake
View File

@@ -3,6 +3,15 @@ set(MCU_LINKER_NAME AT32F405xC)
set(JLINK_DEVICE ${MCU_VARIANT}) set(JLINK_DEVICE ${MCU_VARIANT})
set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
if (NOT DEFINED RHPORT_DEVICE)
set(RHPORT_DEVICE 1)
endif()
if (NOT DEFINED RHPORT_HOST)
set(RHPORT_HOST 0)
endif()
function(update_board TARGET) function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT}) target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction() endfunction()

106
hw/bsp/at32f402_405/boards/at_start_f405/board.h
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@@ -48,7 +48,7 @@
// Button // Button
#define BUTTON_PORT GPIOA #define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0 #define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 0 #define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE) #define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
//USART //USART
@@ -60,111 +60,11 @@
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9 #define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7 #define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
//USB
#ifdef BOARD_TUD_RHPORT
#if BOARD_TUD_RHPORT == 0
#define USB_ID USB_OTG1_ID
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#define USB_SPEED_CORE_ID USB_FULL_SPEED_CORE_ID
#elif BOARD_TUD_RHPORT == 1
#define USB_ID USB_OTG2_ID
#define OTG_CLOCK CRM_OTGHS_PERIPH_CLOCK
#define OTG_IRQ OTGHS_IRQn
#define OTG_IRQ_HANDLER OTGHS_IRQHandler
#define OTG_WKUP_IRQ OTGHS_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGHS_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_10
#define USB_SPEED_CORE_ID USB_HIGH_SPEED_CORE_ID
#endif
#endif
#ifdef BOARD_TUH_RHPORT
#if BOARD_TUH_RHPORT == 0
#define USB_ID USB_OTG1_ID
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#define USB_SPEED_CORE_ID USB_FULL_SPEED_CORE_ID
#elif BOARD_TUH_RHPORT == 1
#define USB_ID USB_OTG2_ID
#define OTG_CLOCK CRM_OTGHS_PERIPH_CLOCK
#define OTG_IRQ OTGHS_IRQn
#define OTG_IRQ_HANDLER OTGHS_IRQHandler
#define OTG_WKUP_IRQ OTGHS_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGHS_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_10
#define USB_SPEED_CORE_ID USB_HIGH_SPEED_CORE_ID
#endif
#endif
//Vbus //Vbus
static inline void board_vbus_sense_init(void) static inline void board_vbus_sense_init(void)
{ {
#ifdef BOARD_TUD_RHPORT *(int*)(0x50000038) |= (1<<21);
#if BOARD_TUD_RHPORT == 0 *(int*)(0x40040038) |= (1<<21);
*(int*)(0x50000038) |= (1<<21);
#elif BOARD_TUD_RHPORT == 1
*(int*)(0x40040038) |= (1<<21);
#endif
#endif
#ifdef BOARD_TUH_RHPORT
#if BOARD_TUH_RHPORT == 0
*(int*)(0x50000038) |= (1<<21);
#elif BOARD_TUH_RHPORT == 1
*(int*)(0x40040038) |= (1<<21);
#endif
#endif
} }
#ifdef __cplusplus #ifdef __cplusplus

4
hw/bsp/at32f402_405/boards/at_start_f405/board.mk
View File

@@ -3,5 +3,9 @@ MCU_LINKER_NAME = AT32F405xC
JLINK_DEVICE = ${MCU_VARIANT} JLINK_DEVICE = ${MCU_VARIANT}
RHPORT_SPEED = OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
RHPORT_DEVICE ?= 1
RHPORT_HOST ?= 0
CFLAGS += \ CFLAGS += \
-D${MCU_VARIANT} -D${MCU_VARIANT}

36
hw/bsp/at32f402_405/family.c
View File

@@ -66,10 +66,11 @@ void board_init(void)
system_clock_config(); system_clock_config();
/* config usb io*/ /* config usb io*/
usb_gpio_config(); //usb_gpio_config();
/* enable usb clock */ /* enable usb clock */
crm_periph_clock_enable(OTG_CLOCK, TRUE); crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_OTGHS_PERIPH_CLOCK, TRUE);
/* select usb 48m clcok source */ /* select usb 48m clcok source */
usb_clock48m_select(USB_CLK_HEXT); usb_clock48m_select(USB_CLK_HEXT);
@@ -82,9 +83,11 @@ void board_init(void)
#if CFG_TUSB_OS == OPT_OS_FREERTOS #if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(OTGHS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#else #else
NVIC_SetPriority(OTG_IRQ, 0); NVIC_SetPriority(OTGHS_IRQn, 0);
NVIC_SetPriority(OTGFS1_IRQn, 0);
#endif #endif
/* config led and key */ /* config led and key */
@@ -160,26 +163,11 @@ void usb_clock48m_select(usb_clk48_s clk_s)
void usb_gpio_config(void) void usb_gpio_config(void)
{ {
gpio_init_type gpio_init_struct; /* When the USB clock is enabled, the hardware will automatically
crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE); configure the pins; but other special pins that need to be used,
gpio_default_para_init(&gpio_init_struct); such as the pins used to detect VBUS or the pins that output the
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; SOF signal, still need to be configured separately, and these pins
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; are usually not required */
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
#ifdef USB_SOF_OUTPUT_ENABLE
crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE);
gpio_init_struct.gpio_pins = OTG_PIN_SOF;
gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct);
gpio_pin_mux_config(OTG_PIN_SOF_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
#endif
/* otgfs use vbus pin */
#ifndef USB_VBUS_IGNORE
gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
#endif
} }
/** /**

23
hw/bsp/at32f402_405/family.cmake
View File

@@ -14,6 +14,23 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "") set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
if (NOT DEFINED RHPORT_DEVICE)
set(RHPORT_DEVICE 0)
endif ()
if (NOT DEFINED RHPORT_HOST)
set(RHPORT_HOST 0)
endif ()
if (NOT DEFINED RHPORT_SPEED)
set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED)
endif ()
if (NOT DEFINED RHPORT_DEVICE_SPEED)
list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
endif ()
if (NOT DEFINED RHPORT_HOST_SPEED)
list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
endif ()
#------------------------------------ #------------------------------------
# BOARD_TARGET # BOARD_TARGET
#------------------------------------ #------------------------------------
@@ -50,8 +67,10 @@ function(add_board_target BOARD_TARGET)
${AT32_SDK_LIB}/drivers/inc ${AT32_SDK_LIB}/drivers/inc
) )
target_compile_definitions(${BOARD_TARGET} PUBLIC target_compile_definitions(${BOARD_TARGET} PUBLIC
BOARD_TUD_RHPORT=0 BOARD_TUD_RHPORT=${RHPORT_DEVICE}
BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
BOARD_TUH_RHPORT=${RHPORT_HOST}
BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
) )
update_board(${BOARD_TARGET}) update_board(${BOARD_TARGET})

28
hw/bsp/at32f402_405/family.mk
View File

@@ -8,10 +8,32 @@ CPU_CORE ?= cortex-m4
CFLAGS_GCC += \ CFLAGS_GCC += \
-flto -flto
RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED
RHPORT_DEVICE ?= 0
RHPORT_HOST ?= 0
ifndef RHPORT_DEVICE_SPEED
ifeq ($(RHPORT_DEVICE), 0)
RHPORT_DEVICE_SPEED = $(firstword $(RHPORT_SPEED))
else
RHPORT_DEVICE_SPEED = $(lastword $(RHPORT_SPEED))
endif
endif
ifndef RHPORT_HOST_SPEED
ifeq ($(RHPORT_HOST), 0)
RHPORT_HOST_SPEED = $(firstword $(RHPORT_SPEED))
else
RHPORT_HOST_SPEED = $(lastword $(RHPORT_SPEED))
endif
endif
CFLAGS += \ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F402_405 \ -DCFG_TUSB_MCU=OPT_MCU_AT32F402_405 \
-DBOARD_TUD_RHPORT=0 \ -DBOARD_TUD_RHPORT=${RHPORT_DEVICE} \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED -DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
LDFLAGS_GCC += \ LDFLAGS_GCC += \
-flto --specs=nosys.specs -nostdlib -nostartfiles -flto --specs=nosys.specs -nostdlib -nostartfiles

2
hw/bsp/at32f403a_407/boards/at_start_f403a/board.cmake
View File

@@ -1,4 +1,4 @@
set(MCU_VARIANT AT32F403ACGU7) set(MCU_VARIANT AT32F403AVGT7)
set(MCU_LINKER_NAME AT32F403AxG) set(MCU_LINKER_NAME AT32F403AxG)
set(JLINK_DEVICE ${MCU_VARIANT}) set(JLINK_DEVICE ${MCU_VARIANT})

2
hw/bsp/at32f403a_407/boards/at_start_f403a/board.mk
View File

@@ -1,4 +1,4 @@
MCU_VARIANT = AT32F403ACGU7 MCU_VARIANT = AT32F403AVGT7
MCU_LINKER_NAME = AT32F403AxG MCU_LINKER_NAME = AT32F403AxG
JLINK_DEVICE = ${MCU_VARIANT} JLINK_DEVICE = ${MCU_VARIANT}

8
hw/bsp/at32f403a_407/boards/at_start_f407/board.cmake Normal file
View File

@@ -0,0 +1,8 @@
set(MCU_VARIANT AT32F407VGT7)
set(MCU_LINKER_NAME AT32F407xG)
set(JLINK_DEVICE ${MCU_VARIANT})
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()

71
hw/bsp/at32f403a_407/boards/at_start_f407/board.h Normal file
View File

@@ -0,0 +1,71 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: AT-START-F403a
url: https://www.arterychip.com/en/product/AT32F403.jsp
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
// LED
#define LED_PORT GPIOD
#define LED_PIN GPIO_PINS_13
#define LED_STATE_ON 0 // Active Low
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
// #define LED_PORT GPIOA
// #define LED_PIN GPIO_PINS_1
// #define LED_STATE_ON 0 // Active Low
// #define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// UART
#define PRINT_UART USART1
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
#define PRINT_UART_TX_PIN GPIO_PINS_9
#define PRINT_UART_TX_GPIO GPIOA
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
static inline void board_vbus_sense_init(void)
{
}
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

7
hw/bsp/at32f403a_407/boards/at_start_f407/board.mk Normal file
View File

@@ -0,0 +1,7 @@
MCU_VARIANT = AT32F407VGT7
MCU_LINKER_NAME = AT32F407xG
JLINK_DEVICE = ${MCU_VARIANT}
CFLAGS += \
-D${MCU_VARIANT}

4
hw/bsp/at32f403a_407/family.c
View File

@@ -29,8 +29,8 @@
*/ */
#include "at32f403a_407_clock.h" #include "at32f403a_407_clock.h"
#include "board.h"
#include "bsp/board_api.h" #include "bsp/board_api.h"
#include "board.h"
void usb_clock48m_select(usb_clk48_s clk_s); void usb_clock48m_select(usb_clk48_s clk_s);
void uart_print_init(uint32_t baudrate); void uart_print_init(uint32_t baudrate);
@@ -102,7 +102,7 @@ void board_init(void) {
gpio_button_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_button_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_button_init_struct.gpio_mode = GPIO_MODE_INPUT; gpio_button_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_button_init_struct.gpio_pins = BUTTON_PIN; gpio_button_init_struct.gpio_pins = BUTTON_PIN;
gpio_button_init_struct.gpio_pull = BUTTON_PULL; gpio_button_init_struct.gpio_pull = GPIO_PULL_DOWN;
gpio_init(BUTTON_PORT, &gpio_button_init_struct); gpio_init(BUTTON_PORT, &gpio_button_init_struct);
uart_print_init(115200); uart_print_init(115200);

2
hw/bsp/at32f413/boards/at_start_f413/board.h
View File

@@ -45,7 +45,7 @@
// Button // Button
#define BUTTON_PORT GPIOA #define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0 #define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 0 #define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE) #define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// UART // UART

2
hw/bsp/at32f415/boards/at_start_f415/board.h
View File

@@ -47,7 +47,7 @@
// Button // Button
#define BUTTON_PORT GPIOA #define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0 #define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 0 #define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE) #define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// Usart // Usart

2
hw/bsp/at32f423/boards/at_start_f423/board.h
View File

@@ -47,7 +47,7 @@
// Button // Button
#define BUTTON_PORT GPIOA #define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0 #define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 0 #define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE) #define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// UART // UART

2
hw/bsp/at32f425/boards/at_start_f425/board.h
View File

@@ -47,7 +47,7 @@
// Button // Button
#define BUTTON_PORT GPIOA #define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0 #define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 0 #define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE) #define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// Usart // Usart

8
hw/bsp/at32f435_437/boards/at_start_f435/board.cmake Normal file
View File

@@ -0,0 +1,8 @@
set(MCU_VARIANT AT32F435ZMT7)
set(MCU_LINKER_NAME AT32F435xM)
set(JLINK_DEVICE ${MCU_VARIANT})
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()

74
hw/bsp/at32f435_437/boards/at_start_f435/board.h Normal file
View File

@@ -0,0 +1,74 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: AT-START-F437
url: https://www.arterychip.com/en/product/AT32F437.jsp
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
//#define USB_VBUS_IGNORE
//#define USB_SOF_OUTPUT_ENABLE
// LED
#define LED_PORT GPIOD
#define LED_PIN GPIO_PINS_13
#define LED_STATE_ON 0 // Active Low
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// USART
#define PRINT_UART USART1
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
#define PRINT_UART_TX_PIN GPIO_PINS_9
#define PRINT_UART_TX_GPIO GPIOA
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
// VBUS
static inline void board_vbus_sense_init(void)
{
*(int*)(0x50000038) |= (1<<21);
*(int*)(0x40040038) |= (1<<21);
}
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

7
hw/bsp/at32f435_437/boards/at_start_f435/board.mk Normal file
View File

@@ -0,0 +1,7 @@
MCU_VARIANT = AT32F435ZMT7
MCU_LINKER_NAME = AT32F435xM
JLINK_DEVICE = ${MCU_VARIANT}
CFLAGS += \
-D${MCU_VARIANT}

117
hw/bsp/at32f435_437/boards/at_start_f437/board.h
View File

@@ -60,124 +60,11 @@
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9 #define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7 #define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
// USB
#ifdef BOARD_TUD_RHPORT
#if BOARD_TUD_RHPORT == 0
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#elif BOARD_TUD_RHPORT == 1
#define USB_ID 1
#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define OTG_IRQ OTGFS2_IRQn
#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_15
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define OTG_PIN_DM GPIO_PINS_14
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_12
#endif
#endif
#ifdef BOARD_TUH_RHPORT
#if BOARD_TUH_RHPORT == 0
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
#elif BOARD_TUH_RHPORT == 1
#define USB_ID 1
#define OTG_CLOCK CRM_OTGFS2_PERIPH_CLOCK
#define OTG_IRQ OTGFS2_IRQn
#define OTG_IRQ_HANDLER OTGFS2_IRQHandler
#define OTG_WKUP_IRQ OTGFS2_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS2_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_20
#define OTG_PIN_GPIO GPIOB
#define OTG_PIN_GPIO_CLOCK CRM_GPIOB_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_15
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE15
#define OTG_PIN_DM GPIO_PINS_14
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE14
#define OTG_PIN_VBUS GPIO_PINS_13
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE13
#define OTG_PIN_ID GPIO_PINS_12
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_4
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE4
#define OTG_PIN_MUX GPIO_MUX_12
#endif
#endif
// VBUS // VBUS
static inline void board_vbus_sense_init(void) static inline void board_vbus_sense_init(void)
{ {
#ifdef BOARD_TUD_RHPORT *(int*)(0x50000038) |= (1<<21);
#if BOARD_TUD_RHPORT == 0 *(int*)(0x40040038) |= (1<<21);
*(int*)(0x50000038) |= (1<<21);
#elif BOARD_TUD_RHPORT == 1
*(int*)(0x40040038) |= (1<<21);
#endif
#endif
#ifdef BOARD_TUH_RHPORT
#if BOARD_TUH_RHPORT == 0
*(int*)(0x50000038) |= (1<<21);
#elif BOARD_TUH_RHPORT == 1
*(int*)(0x40040038) |= (1<<21);
#endif
#endif
} }
#ifdef __cplusplus #ifdef __cplusplus

40
hw/bsp/at32f435_437/family.c
View File

@@ -64,21 +64,23 @@ void board_init(void) {
usb_gpio_config(); usb_gpio_config();
/* enable usb clock */ /* enable usb clock */
crm_periph_clock_enable(OTG_CLOCK, TRUE); crm_periph_clock_enable(CRM_OTGFS1_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_OTGFS2_PERIPH_CLOCK, TRUE);
/* select usb 48m clcok source */ /* select usb 48m clcok source */
usb_clock48m_select(USB_CLK_HEXT); usb_clock48m_select(USB_CLK_HEXT);
/* enable otgfs irq */
//nvic_irq_enable(OTG_IRQ, 0, 0);
/* vbus ignore */ /* vbus ignore */
board_vbus_sense_init(); board_vbus_sense_init();
SysTick_Config(SystemCoreClock / 1000); SysTick_Config(SystemCoreClock / 1000);
#if CFG_TUSB_OS == OPT_OS_FREERTOS #if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
NVIC_SetPriority(OTGFS2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#else
NVIC_SetPriority(OTGFS1_IRQn, 0);
NVIC_SetPriority(OTGFS2_IRQn, 0);
#endif #endif
/* config led and key */ /* config led and key */
@@ -271,30 +273,22 @@ int inHandlerMode(void) {
void usb_gpio_config(void) { void usb_gpio_config(void) {
gpio_init_type gpio_init_struct; gpio_init_type gpio_init_struct;
crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE); crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
gpio_default_para_init(&gpio_init_struct); gpio_default_para_init(&gpio_init_struct);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER; gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL; gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX; gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE; gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
/* dp and dm */ /* dp and dm */
gpio_init_struct.gpio_pins = OTG_PIN_DP | OTG_PIN_DM; gpio_init_struct.gpio_pins = GPIO_PINS_11 | GPIO_PINS_12;
gpio_init(OTG_PIN_GPIO, &gpio_init_struct); gpio_init(GPIOA, &gpio_init_struct);
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DP_SOURCE, OTG_PIN_MUX); gpio_init_struct.gpio_pins = GPIO_PINS_14 | GPIO_PINS_15;
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_DM_SOURCE, OTG_PIN_MUX); gpio_init(GPIOB, &gpio_init_struct);
#ifdef USB_SOF_OUTPUT_ENABLE gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_10);
crm_periph_clock_enable(OTG_PIN_SOF_GPIO_CLOCK, TRUE); gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE12, GPIO_MUX_10);
gpio_init_struct.gpio_pins = OTG_PIN_SOF; gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE14, GPIO_MUX_12);
gpio_init(OTG_PIN_SOF_GPIO, &gpio_init_struct); gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE15, GPIO_MUX_12);
gpio_pin_mux_config(OTG_PIN_SOF_GPIO, OTG_PIN_SOF_SOURCE, OTG_PIN_MUX);
#endif
/* otgfs use vbus pin */
#ifndef USB_VBUS_IGNORE
gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
#endif
} }
void board_led_write(bool state) { void board_led_write(bool state) {

5
hw/bsp/at32f435_437/family.cmake
View File

@@ -51,7 +51,10 @@ function(add_board_target BOARD_TARGET)
${AT32_SDK_LIB}/drivers/inc ${AT32_SDK_LIB}/drivers/inc
) )
target_compile_definitions(${BOARD_TARGET} PUBLIC target_compile_definitions(${BOARD_TARGET} PUBLIC
BOARD_TUD_RHPORT=0 BOARD_TUD_RHPORT=1
BOARD_TUH_RHPORT=0
BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
) )
update_board(${BOARD_TARGET}) update_board(${BOARD_TARGET})

5
hw/bsp/at32f435_437/family.mk
View File

@@ -10,7 +10,10 @@ CFLAGS_GCC += \
CFLAGS += \ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F435_437 \ -DCFG_TUSB_MCU=OPT_MCU_AT32F435_437 \
-DBOARD_TUD_RHPORT=0 -DBOARD_TUD_RHPORT=1 \
-DBOARD_TUH_RHPORT=0 \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED \
-DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED \
LDFLAGS_GCC += \ LDFLAGS_GCC += \
-flto --specs=nosys.specs -nostdlib -nostartfiles -flto --specs=nosys.specs -nostdlib -nostartfiles