minor update for control xfer
This commit is contained in:
@@ -110,14 +110,14 @@ typedef struct {
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tu_edpt_state_t ep_status[CFG_TUH_ENDPOINT_MAX][2];
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tu_edpt_state_t ep_status[CFG_TUH_ENDPOINT_MAX][2];
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#if CFG_TUH_API_EDPT_XFER
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#if CFG_TUH_API_EDPT_XFER
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struct
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// struct
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{
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// {
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uint8_t* buffer;
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// uint8_t* buffer;
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tuh_xfer_cb_t complete_cb;
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// tuh_xfer_cb_t complete_cb;
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uintptr_t user_data;
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// uintptr_t user_data;
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uint16_t buflen;
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// uint16_t buflen;
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volatile uint16_t actual_len;
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// volatile uint16_t actual_len;
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}ep_xfer;
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// }ep_xfer[[]];
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#endif
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#endif
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} usbh_device_t;
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} usbh_device_t;
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@@ -247,16 +247,6 @@ static osal_queue_t _usbh_q;
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CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
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CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
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static uint8_t _usbh_ctrl_buf[CFG_TUH_ENUMERATION_BUFSIZE];
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static uint8_t _usbh_ctrl_buf[CFG_TUH_ENUMERATION_BUFSIZE];
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//// internal version of tuh_xfer_t
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//typedef struct
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//{
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// uint8_t* buffer;
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// tuh_xfer_cb_t complete_cb;
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// uintptr_t user_data;
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//
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// volatile uint16_t actual_len;
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//}usbh_xfer_t;
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// Control transfer: since most controller does not support multiple control transfer
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// Control transfer: since most controller does not support multiple control transfer
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// on multiple devices concurrently. And control transfer is not used much except enumeration
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// on multiple devices concurrently. And control transfer is not used much except enumeration
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// We will only execute control transfer one at a time.
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// We will only execute control transfer one at a time.
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@@ -267,9 +257,9 @@ struct
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tuh_xfer_cb_t complete_cb;
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tuh_xfer_cb_t complete_cb;
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uintptr_t user_data;
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uintptr_t user_data;
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volatile uint16_t actual_len;
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uint8_t daddr;
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uint8_t daddr; // transferring device
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volatile uint8_t stage;
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volatile uint8_t stage;
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volatile uint16_t actual_len;
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}_ctrl_xfer;
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}_ctrl_xfer;
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//------------- Helper Function -------------//
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//------------- Helper Function -------------//
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@@ -298,6 +288,8 @@ bool tuh_mounted(uint8_t dev_addr)
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bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid)
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bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid)
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{
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{
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*vid = *pid = 0;
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usbh_device_t const* dev = get_device(dev_addr);
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usbh_device_t const* dev = get_device(dev_addr);
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TU_VERIFY(dev && dev->configured);
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TU_VERIFY(dev && dev->configured);
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@@ -327,6 +319,8 @@ void osal_task_delay(uint32_t msec)
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// Descriptors Async
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// Descriptors Async
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// generic helper to get a descriptor
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// if blocking, user_data could be pointed to xfer_result
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static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
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static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
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tuh_xfer_cb_t complete_cb, uintptr_t user_data)
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tuh_xfer_cb_t complete_cb, uintptr_t user_data)
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{
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{
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@@ -353,7 +347,15 @@ static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t
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.user_data = user_data
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.user_data = user_data
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};
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};
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return tuh_control_xfer(daddr, &xfer);
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bool const ret = tuh_control_xfer(daddr, &xfer);
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// if blocking, user_data could be pointed to xfer_result
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if ( !complete_cb && user_data )
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{
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*((xfer_result_t*) user_data) = xfer.result;
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}
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return ret;
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}
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}
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bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len,
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bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len,
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@@ -411,6 +413,7 @@ bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void*
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}
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}
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// Get HID report descriptor
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// Get HID report descriptor
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// if blocking, user_data could be pointed to xfer_result
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bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len,
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bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len,
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tuh_xfer_cb_t complete_cb, uintptr_t user_data)
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tuh_xfer_cb_t complete_cb, uintptr_t user_data)
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{
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{
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@@ -438,7 +441,15 @@ bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_
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.user_data = user_data
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.user_data = user_data
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};
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};
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return tuh_control_xfer(daddr, &xfer);
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bool const ret = tuh_control_xfer(daddr, &xfer);
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// if blocking, user_data could be pointed to xfer_result
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if ( !complete_cb && user_data )
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{
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*((xfer_result_t*) user_data) = xfer.result;
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}
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return ret;
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}
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}
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bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
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bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
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@@ -549,6 +560,7 @@ bool tuh_init(uint8_t rhport)
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TU_LOG2_INT(sizeof(usbh_device_t));
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TU_LOG2_INT(sizeof(usbh_device_t));
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TU_LOG2_INT(sizeof(hcd_event_t));
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TU_LOG2_INT(sizeof(hcd_event_t));
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TU_LOG2_INT(sizeof(_ctrl_xfer));
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TU_LOG2_INT(sizeof(_ctrl_xfer));
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TU_LOG2_INT(sizeof(tuh_xfer_t));
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// Event queue
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// Event queue
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_usbh_q = osal_queue_create( &_usbh_qdef );
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_usbh_q = osal_queue_create( &_usbh_qdef );
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@@ -972,14 +984,8 @@ bool tuh_control_xfer (uint8_t daddr, tuh_xfer_t* xfer)
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// TODO probably some timeout to prevent hanged
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// TODO probably some timeout to prevent hanged
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}
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}
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// update xfer result
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// update transfer result
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xfer->result = result;
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xfer->result = result;
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if ( xfer->user_data )
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{
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// if user_data is not NULL, it is also updated
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*((xfer_result_t*) xfer->user_data) = result;
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}
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xfer->actual_len = _ctrl_xfer.actual_len;
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xfer->actual_len = _ctrl_xfer.actual_len;
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}
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}
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