update nrf52840 examples
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@@ -98,47 +98,62 @@ void msc_app_umount(uint8_t rhport)
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}
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msc_csw_status_t tud_msc_scsi_cb (uint8_t rhport, uint8_t lun, uint8_t scsi_cmd[16], void const ** pp_buffer, uint16_t* p_length)
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bool tud_msc_scsi_cb (uint8_t rhport, uint8_t lun, uint8_t scsi_cmd[16], void* buffer, uint16_t* p_len)
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{
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// read10 & write10 has their own callback and MUST not be handled here
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void* bufptr = NULL;
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uint16_t buflen = 0;
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switch (scsi_cmd[0])
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{
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case SCSI_CMD_INQUIRY:
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(*pp_buffer) = &mscd_inquiry_data;
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(*p_length) = sizeof(scsi_inquiry_data_t);
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bufptr = &mscd_inquiry_data;
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buflen = sizeof(scsi_inquiry_data_t);
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break;
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case SCSI_CMD_READ_CAPACITY_10:
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(*pp_buffer) = &mscd_read_capacity10_data;
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(*p_length) = sizeof(scsi_read_capacity10_data_t);
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bufptr = &mscd_read_capacity10_data;
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buflen = sizeof(scsi_read_capacity10_data_t);
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break;
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case SCSI_CMD_REQUEST_SENSE:
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(*pp_buffer) = &mscd_sense_data;
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(*p_length) = sizeof(scsi_sense_fixed_data_t);
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bufptr = &mscd_sense_data;
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buflen = sizeof(scsi_sense_fixed_data_t);
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break;
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case SCSI_CMD_READ_FORMAT_CAPACITY:
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(*pp_buffer) = &mscd_format_capacity_data;
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(*p_length) = sizeof(scsi_read_format_capacity_data_t);
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bufptr = &mscd_format_capacity_data;
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buflen = sizeof(scsi_read_format_capacity_data_t);
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break;
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case SCSI_CMD_MODE_SENSE_6:
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(*pp_buffer) = &msc_dev_mode_para;
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(*p_length) = sizeof(msc_dev_mode_para);
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bufptr = &msc_dev_mode_para;
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buflen = sizeof(msc_dev_mode_para);
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break;
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case SCSI_CMD_TEST_UNIT_READY:
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(*pp_buffer) = NULL;
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(*p_length) = 0;
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bufptr = NULL;
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buflen= 0;
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break;
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case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
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(*pp_buffer) = NULL;
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(*p_length) = 0;
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bufptr = NULL;
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buflen= 0;
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break;
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default: return MSC_CSW_STATUS_FAILED;
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default:
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(*p_len) = 0;
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return false;
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}
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if ( bufptr && buflen )
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{
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// Response len must not larger than expected from host
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TU_ASSERT( (*p_len) >= buflen );
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memcpy(buffer, bufptr, buflen);
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(*p_len) = buflen;
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}
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//------------- clear sense data if it is not request sense command -------------//
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@@ -149,7 +164,7 @@ msc_csw_status_t tud_msc_scsi_cb (uint8_t rhport, uint8_t lun, uint8_t scsi_cmd[
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mscd_sense_data.additional_sense_qualifier = 0;
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}
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return MSC_CSW_STATUS_PASSED;
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return true;
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}
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//--------------------------------------------------------------------+
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@@ -91,13 +91,13 @@ uint8_t msc_device_ramdisk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
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//--------------------------------------------------------------------+
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// IMPLEMENTATION
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//--------------------------------------------------------------------+
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uint16_t tud_msc_read10_cb (uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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uint16_t tud_msc_read10_cb (uint8_t rhport, uint8_t lun, uint32_t lba, uint16_t block_count, void** pp_buffer)
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{
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(*pp_buffer) = msc_device_ramdisk[lba];
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return min16_of(block_count, DISK_BLOCK_NUM);
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}
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uint16_t tud_msc_write10_cb(uint8_t rhport, uint8_t lun, void** pp_buffer, uint32_t lba, uint16_t block_count)
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uint16_t tud_msc_write10_cb(uint8_t rhport, uint8_t lun, uint32_t lba, uint16_t block_count, void** pp_buffer)
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{
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(*pp_buffer) = msc_device_ramdisk[lba];
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@@ -46,10 +46,14 @@
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//--------------------------------------------------------------------+
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// CONTROLLER CONFIGURATION
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//--------------------------------------------------------------------+
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//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
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#define CFG_TUSB_MCU OPT_MCU_NRF5X
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#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
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#define CFG_TUSB_DEBUG 2
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#define CFG_TUSB_OS OPT_OS_NONE // be passed from IDE/command line for easy project switching
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//#define CFG_TUD_TASK_PRIO 0 // be passed from IDE/command line for easy project switching
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#define CFG_TUSB_MCU OPT_MCU_NRF5X
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#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE)
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//--------------------------------------------------------------------+
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// DEVICE CONFIGURATION
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@@ -63,27 +67,24 @@
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#define CFG_TUD_MSC 1
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#define CFG_TUD_CDC 1
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//--------------------------------------------------------------------+
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// COMMON CONFIGURATION
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//--------------------------------------------------------------------+
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#define CFG_TUSB_DEBUG 2
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/*------------------------------------------------------------------*/
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/* CLASS DRIVER
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*------------------------------------------------------------------*/
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// FIFO size of CDC TX and RX
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#define CFG_TUD_CDC_BUFSIZE 64
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// TX is sent automatically every Start of Frame event.
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// If not enabled, application must call tud_cdc_flush() periodically
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#define CFG_TUD_CDC_FLUSH_ON_SOF 1
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#define CFG_TUSB_OS OPT_OS_NONE // be passed from IDE/command line for easy project switching
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//#define CFG_TUD_TASK_PRIO 0 // be passed from IDE/command line for easy project switching
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//--------------------------------------------------------------------+
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// USB RAM PLACEMENT
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//--------------------------------------------------------------------+
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#define CFG_TUSB_ATTR_USBRAM
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#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
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// LPC11uxx and LPC13uxx requires each buffer has to be 64-byte alignment
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#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13UXX
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#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(64)
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#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
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#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4)
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#else
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#define CFG_TUSB_MEM_ALIGN
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#endif
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#ifdef __cplusplus
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}
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